CS8101
Package Lead Description
PACKAGE LEAD #
LEAD SYMBOL
FUNCTION
8 Lead
SOIC
8
1
3
4
5
2
20 Lead SOIC
(Internally Fused Leads)
19
20
1
4,5,6,7
14,15,16,17
10
5 Lead
TO-220
5
1
2
3
4
V
IN
V
OUT
ENABLE
Gnd
RESET
V
OUT
Sense
Input voltage.
5V, ±2%, 100mA output.
Logic level switches output off when toggled HIGH.
Ground. All Gnd leads must be connected to Ground.
Active reset (accurate to V
OUT
³ 1V).
Kelvin connection which allows remote sensing of out-
put voltage for improved regulation. If remote sensing
is not required, connect to V
OUT
.
No Connection.
6,7
2,3,8,9,11,12,13,18
NC
Circuit Description
Voltage Reference and Output Circuitry
Output Stage Protection
The output stage is protected against overvoltage, short
circuit and thermal runaway conditions (Figure 1).
FOR 7V < V
IN
< 26V
V
IN
ENABLE
V
IN
H
> 30V
V
RH
V
RL
VIN
VOUT
V
OUT
(1)
VR
PEAK
(2)
VR
LO
(1) = NO RESET DELAY CAPACITOR
(2) = WITH RESET DELAY CAPACITOR
VR
PEAK
RESET
IOUT
Load
Dump
Current
Limit
Short
Circuit
Figure 2. Circuit Waveform
Figure 1. Typical Circuit Waveforms for Output Stage Protection.
If the input voltage rises above 30V (e.g. load dump), the out-
put shuts down. This response protects the internal circuitry
and enables the IC to survive unexpected voltage transients.
Should the junction temperature of the power device exceed
180ûC (typ) the load current capability is reduced thereby
preventing thermal overload. This thermal management
function is an effective means to prevent die overheating
since the load current is the principle heat source in the IC.
Regulator Control Functions
The CS8101 contains two microprocessor compatible con-
trol functions: ENABLE and RESET (Figure 2).
ENABLE Function
The ENABLE function switches the output transistor ON
and OFF. When the voltage on the ENABLE lead exceeds
1.4V typ, the output pass transistor turns off, leaving a
high impedance facing the load. The IC will remain in
Sleep mode, drawing only 50µA, until the voltage on this
input drops below the ENABLE threshold.
RESET Function
A RESET signal (low voltage) is generated as the IC pow-
ers up until V
OUT
is within 250mV of the regulated output
voltage, or when V
OUT
drops out of regulation,and is
lower than 300mV below the regulated output voltage. A
hysteresis of 50mV is included in the function to minimize
oscillations.
The RESET output is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC thereby
guaranteeing that the RESET signal is valid for V
OUT
as low
as 1V.
3
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
