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CS8126-2GTHA5 参数 Datasheet PDF下载

CS8126-2GTHA5图片预览
型号: CS8126-2GTHA5
PDF下载: 下载PDF文件 查看货源
内容描述: 5V , 750毫安低压差线性稳压器,具有延时复归 [5V, 750mA Low Dropout Linear Regulator with Delayed RESET]
分类和应用: 稳压器
文件页数/大小: 9 页 / 210 K
品牌: CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
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CS8126, -1, -2
Application Diagram
V
IN
C
1
*
100nF
V
OUT
CS8126
Delay
RESET
R
RST
4.7kW
C
2
**
10mF to 100mF
Gnd
Delay
0.1mF
C
1
* is required if the regulator is far from the power source filter.
C
2
** is required for stability
Application Notes
Stability Considerations
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: start-up
delay, load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum
or aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR, can cause insta-
bility. The aluminum electrolytic capacitor is the least
expensive solution, but, if the circuit operates at low tem-
peratures (-25¡C to -40¡C), both the value and ESR of the
capacitor will vary considerably. The capacitor manufac-
turers data sheet usually provides this information.
The value for the output capacitor C
2
shown in the test
and applications circuit should work for most applica-
tions, however it is not necessarily the optimized solution.
To determine an acceptable value for C
2
for a particular
application, start with a tantalum capacitor of the recom-
mended value and work towards a less expensive alterna-
tive part.
Step 1:
Place the completed circuit with a tantalum capac-
itor of the recommended value in an environmental cham-
ber at the lowest specified operating temperature and
monitor the outputs with an oscilloscope. A decade box
connected in series with the capacitor will simulate the
higher ESR of an aluminum capacitor. Leave the decade
box outside the chamber, the small resistance added by
the longer leads is negligible.
Step 2:
With the input voltage at its maximum value,
increase the load current slowly from zero to full load
while observing the output for any oscillations. If no oscil-
lations are observed, the capacitor is large enough to
ensure a stable design under steady state conditions.
Step 3:
Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that
cause the greatest oscillation. This represents the worst
case load conditions for the regulator at low temperature.
Step 4:
Maintain the worst case load conditions set in step
3 and vary the input voltage until the oscillations increase.
6
This point represents the worst case input voltage condi-
tions.
Step 5:
If the capacitor is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. A smaller capaci-
tor will usually cost less and occupy less board space. If
the output oscillates within the range of expected operat-
ing conditions, repeat steps 3 and 4 with the next larger
standard capacitor value.
Step 6:
Test the load transient response by switching in
various loads at several frequencies to simulate its real
working environment. Vary the ESR to reduce ringing.
Step 7:
Remove the unit from the environmental chamber
and heat the IC with a heat gun. Vary the load current as
instructed in step 5 to test for any oscillations.
Once the minimum capacitor value with the maximum
ESR is found, a safety factor should be added to allow for
the tolerance of the capacitor and any variations in regula-
tor performance. Most good quality aluminum electrolytic
capacitors have a tolerance of +/- 20% so the minimum
value found should be increased by at least 50% to allow
for this tolerance plus the variation which will occur at
low temperatures. The ESR of the capacitor should be less
than 50% of the maximum allowable ESR found in step 3
above.
Calculating Power Dissipation
in a Single Output Linear Regulator
The maximum power dissipation for a single output regu-
lator (Figure 1) is:
P
D(max)
= {V
IN(max)
- V
OUT(min)
}I
OUT(max)
+ V
IN(max)
I
Q
where:
V
IN(max)
is the maximum input voltage,
V
OUT(min)
is the minimum output voltage,
I
OUT(max)
is the maximum output current for the applica-
tion, and
I
Q
is the quiescent current the regulator consumes at
I
OUT(max)
.
(1)