CS5102A
SWITCHING CHARACTERISTICS
(T
A
= T
MIN
to T
MAX
;
Parameter
CLKIN Period
CLKIN Low Time
CLKIN High Time
Crystal Frequency
SLEEP Rising to Oscillator Stable
RST Pulse Width
RST to STBY Falling
RST Rising to STBY Rising
CH1/2 Edge to TRK1, TRK2 Rising
CH1/2 Edge to TRK1, TRK2 Falling
HOLD to SSH Falling
HOLD to TRK1, TRK2, Falling
HOLD to TRK1, TRK2, SSH Rising
HOLD Pulse Width
HOLD to CH1/2 Edge
HOLD Falling to CLKIN Falling
(Note 27)
(Note 27)
(Note 28)
(Note 28)
(Note 28)
(Note 29)
(Note 28)
(Note 29)
(Note 24, 25)
(Note 26)
(Note 18,24)
VA+, VD+ = 5V
±
10%; VA-, VD- = -5V
±
10%; Inputs: Logic 0 = 0V, Logic 1 = VD+; C
L
= 50 pF)
Symbol
t
clk
t
clkl
t
clkh
f
xtal
-
t
rst
t
drrs
t
cal
t
drsh1
t
dfsh4
t
dfsh2
t
dfsh1
t
drsh
t
hold
t
dhlri
t
hcf
Min
0.5
200
200
0.9
-
150
-
-
-
-
-
66t
clk
-
1t
clk
+20
15
55
Typ
-
-
-
1.6
20
-
100
2,882,040
80
-
60
-
120
-
-
-
68t
clk
+260
-
63t
clk
64t
clk
1tclk+10
Max
10
-
-
2.0
-
-
-
-
-
68t
clk
+260
Units
µs
ns
ns
MHz
ms
ns
ns
t
clk
ns
ns
ns
ns
ns
ns
ns
ns
Note: 24. Minimum CLKIN period is 0.625
µs
in FRN mode (20 kHz sample rate). At temperatures >+85
°C,
and with clock frequencies <1.6 MHz, analog performance may be degraded.
25. External loading capacitors are required to allow the crystal to oscillate. Maximum crystal frequency
is 1.6 MHz in FRN mode (20 kHz sample rate).
26. With a 2.0 MHz crystal, two 33 pF loading capacitors and a 10 MΩ parallel resistor (see Figure 8).
27. These times are for FRN mode.
28. SSH only works correctly if HOLD falling edge is within +15 to +30 ns of CH1/2 edge or if CH1/2 edge
occurs after HOLD rises to 64 t
clk
after HOLD has fallen. These times are for PDT and RBT modes.
29. When HOLD goes low, the analog sample is captured immediately. To start conversion, HOLD must
be latched by a falling edge of CLKIN. Conversion will begin on the next rising edge of CLKIN
after HOLD is latched. If HOLD is operated synchronous to CLKIN, the HOLD pulse width may be as
narrow as 150 ns for all CLKIN frequencies if CLKIN falls 55 ns after HOLD falls. This
ensures that the HOLD pulse will meet the minimum specification for t
hcf
.
DS45F2
7
CIRRUS [ CIRRUS LOGIC ]
