CS5364
Stand-Alone Mode
CLKMODE
DIF1
DIF0
M1
M0
MDIV
34
37
38
39
40
42
CLKMODE
(Input)
- Setting this pin HIGH places a divide-by-1.5 circuit in the MCLK path to the
core device circuitry.
DIF1, DIF0
(Input) - Sets the serial audio interface format.
Mode Selection
(Input) - Determines the operational mode of the device.
MCLK Divider
(Input) - Setting this pin HIGH places a divide-by-2 circuit in the MCLK path to the
core device circuitry.
CLKMODE
(Input)
- This pin is ignored in Control Port Mode and the same functionality is
obtained from the corresponding bit in the Global Control Register.
Note:
Should be connected
to GND when using the part in Control Port Mode.
I²C Format, AD1
(Input) - Forms the device address input AD[1].
SPI Format, CDIN
(Input)
-
Becomes the input data pin.
I²C Format, AD0
(Input) - Forms the device address input AD[0].
SPI Format, CS
(Input) - Acts as the active low chip select input.
I²C Format, SCL
(Output) - Acts as the serial clock output from the CS5364.
SPI Format, CCLK
(Output) - Acts as the serial clock output from the CS5364.
I²C Format SDA
(Input/Output) - Acts as an input/output data pin.
SPI Format CDOUT
(Output) - Acts as an output only data pin.
MCLK Divider
(Input) - This pin is ignored in Control Port Mode, and the same functionality is
obtained from the corresponding bit in the Global Control Register.
Note:
Should be connected to GND when using the part in Control Port Mode.
Control Port Mode
CLKMODE
AD1/CDIN
AD0/CS
SCL/CCLK
SDA/CDOUT
MDIV
34
37
38
39
40
42
8
DS625F2
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