CS5368
2. TYPICAL CONNECTION DIAGRAM
Resistor may only be used if
VD is derived from VA. If used,
do not drive any other logic
from VD.
+
1
μ
F
+5V to 3.3V
+5V
+
1
μ
F
0.01
μ
F
4, 9
5.1
Ω
33
0.01
μ
F
VA
6
VD
220
μ
F
1
μ
F
+
0.1
μF
0.1
μF
FILT+
REF_GND
VQ
GND
5
7
VLC
35
+5V to 1.8V
0.01
μF
39
40
36
37
38
41
42
34
+
8
Channel 1 Analog
Input Buffer
47
48
1
2
13
14
11
12
45
46
43
44
15
16
17
18
AIN 1+
AIN 1-
AIN 2+
AIN 2-
AIN 3+
AIN 3-
AIN 4+
AIN 4-
AIN 5+
AIN 5-
AIN 6+
AIN 6-
AIN 7+
AIN 7-
AIN 8+
AIN 8-
GND
MODE1/SCL/CCLK
MODE0/SDA/CDOUT
OVFL
DIF1/AD1/CDIN
DIF0/AD0/CS
RST
MDIV
CLKMODE
Power Down
and Mode
Settings
Channel 2 Analog
Input Buffer
Channel 3 Analog
Input Buffer
CS5368
A/D CONVERTER
VLS
28
+5V to 1.8V
0.01
μF
30
27
31
26
24
25
23
Channel 4 Analog
Input Buffer
SDOUT1/ TDM
SDOUT2
SDOUT3/ TDM
SDOUT4
LRCK/FS
SCLK
MCLK
Audio Data
Processor
Channel 5 Analog
Input Buffer
Timing Logic
and Clock
Channel 6 Analog
Input Buffer
Channel 7 Analog
Input Buffer
VX
XTI
XTO
20
+5V
21
22
Channel 8 Analog
Input Buffer
3, 8, 10,
19, 29, 32
Figure 2. Typical Connection Diagram
For analog buffer configurations, refer to Cirrus Application Note AN241. Also, a low-cost single-ended-to-differen-
tial solution is provided on the
DS624F2
9
CIRRUS [ CIRRUS LOGIC ]
