CS5396 CS5397
I
2
C CONTROL PORT SWITCHING CHARACTERISTICS
Inputs: Logic 0 = DGND, Logic 1 = VD; C
L
= 20 pF)
Parameter
Symbol
Min
-
4.7
4.0
4.7
4.0
4.7
0
250
-
-
4.7
Max
100
-
-
-
-
-
-
-
1
300
-
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
(T
A
= 25 °C; VD, VA = 5V ±5%;
I
2
C
®
Mode
CCLK Clock Frequency
Bus Free Time Between Transmissions
(Note 9)
f
scl
t
buf
t
hdst
t
low
t
high
t
sust
(Note 10)
t
hdd
t
sud
t
r
t
f
t
susp
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
Clock High Time
Setup Time for Repeated Start Condition
CDIN Hold Time from CCLK Falling
CDIN Setup Time to CCLK Rising
Rise Time of Both CDIN and CCLK Lines
Fall Time of Both CDIN and CCLK Lines
Setup Time for Stop Condition
Notes: 9. Use of the I
2
C
®
bus interface requires a license from Philips.
10. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
Stop
CDIN
t
buf
Start
Repeated
Start
Stop
t hdst
t high
t
hdst
tf
t susp
CCLK
t
t
t sud
t sust
tr
low
hdd
10
DS229PP2
CIRRUS [ CIRRUS LOGIC ]
