CS5471
SWITCHING CHARACTERISTICS
(T
A
= -40 °C to +85 °C; VA+, VD+ = 3.0 V ±10%; VA- = -2 V
±10%; DGND = AGND = 0.0 V; Logic Levels: Logic 0 = 0.0 V, Logic 1 = VD+; CL = 50pF))
Parameter
Master Clock Frequency
Master Clock Duty Cycle
Rise Times
Fall Times
Serial Port Timing
Serial Clock Frequency
(Note 12)
OWRS = “0”
OWRS = “1”
Pulse Width High (Note 12)
Pulse Width Low (Note 12)
(Note 12)
(Note 12)
SCLK
SCLK
t
1
t
2
t
3
t
4
t
5
t
6
t
7
-
-
-
-
-
-
-
-
-
500
1000
0.5
0.5
-
0.5
1
-
-
-
-
-
-
50
-
-
50
50
kHz
kHz
SCLK
SCLK
ns
SCLK
SCLK
ns
ns
Any Digital Input (Note 13)
Any Digital Output
Any Digital Input (Note 13)
Any Digital Output
(Note 12)
Symbol
XIN
-
t
rise
t
fall
Min
3
40
-
-
-
-
Typ
4.000
-
-
50
-
50
Max
5
60
1.0
-
1.0
-
Unit
MHz
%
µs
ns
µs
ns
Serial Clock
SCLK falling to New Data Bit
FSO Falling to SCLK Rising Delay
FSO Pulse Width
SE Rising to Output Enabled
SE Falling to Output in Tri-state
Notes: 12. Device parameters are specified with a 4.000 MHz clock, OWRS = 1.
13. Specified using 10% and 90% points on wave-form of interest. Output loaded with 50 pF.
SDO
MSB(V1)
MSB(V1) - 1
LSB(I2)
t
3
SCLK
t
4
FSO
t
5
t
1
t
2
t
6
SE
t
6
Figure 1. Serial Port Timing
6