PIC16F616/16HV616
2.0
2.1
MEMORY ORGANIZATION
Program Memory Organization
2.2
Data Memory Organization
The PIC16F616/16HV616 has a 13-bit program
counter capable of addressing an 8k x 14 program
memory space. Only the first 2K x 14 (0000h-07FFh)
for the PIC16F616/16HV616 is physically imple-
mented. Accessing a location above these boundaries
will cause a wraparound within the first 2K x 14 space.
The Reset vector is at 0000h and the interrupt vector is
at 0004h (see Figure 2-1).
The data memory (see Figure 2-2) is partitioned into two
banks, which contain the General Purpose Registers
(GPR) and the Special Function Registers (SFR). The
Special Function Registers are located in the first 32
locations of each bank. Register locations 20h-7Fh in
Bank 0 and A0h-BFh in Bank 1 are General Purpose
Registers, implemented as static RAM. Register
locations F0h-FFh in Bank 1 point to addresses 70h-7Fh
in Bank 0. All other RAM is unimplemented and returns
‘0’ when read. The RP0 bit of the STATUS register is the
bank select bit.
RP0
0
1
→
→
Bank 0 is selected
Bank 1 is selected
FIGURE 2-1:
PROGRAM MEMORY MAP
AND STACK FOR THE
PIC16F616/16HV616
PC<12:0>
CALL, RETURN
RETFIE, RETLW
13
Note:
The IRP and RP1 bits of the STATUS
register are reserved and should always be
maintained as ‘0’s.
Stack Level 1
Stack Level 2
Stack Level 8
Reset Vector
0000h
Interrupt Vector
0004h
0005h
On-chip Program
Memory
07FFh
0800h
Wraps to 0000h-07FFh
1FFFh
©
2006 Microchip Technology Inc.
Preliminary
DS41288A-page 7
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