GMSK Modem
CMX589A
4.2.5
Rx S/N Detection
The Rx S/N Detector system classifies the incoming zero-crossings as GOOD or BAD depending upon the
time when each crossing actually occurs with respect to its expected time as determined by the Clock
Extraction PLL. This information is then processed to provide a logic level output at the Rx S/N pin. A high
level indicates a series of GOOD crossings; a low level indicates a BAD crossing.
By averaging this output, it is possible to derive a measure of the Signal-to-Noise-Ratio and hence the
Bit-Error-Rate of the received signal.
Figure 6: Typical Bit-Error-Rate Performance at V
DD
= 5.0V
Note:
Figure 6 indicates typical performance, independent of bit rate (although the applied noise bandwidth is
considered to match the bit rate used), radio performance (e.g. IF filter distortion), supply voltage (higher bit
rates require V
DD
≥
4.5V), and other ‘real world’ factors.
©
2002 CML Microsystems Plc
11
D/589A/4
CMLMICRO [ CML MICROCIRCUITS ]
