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CMX624 参数 Datasheet PDF下载

CMX624图片预览
型号: CMX624
PDF下载: 下载PDF文件 查看货源
内容描述: V.23 /贝尔202调制解调器 [V.23 / Bell 202 Modem]
分类和应用: 调制解调器
文件页数/大小: 26 页 / 702 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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V23 / Bell 202 Modem  
CMX624  
1.7.1.3 Operating Characteristics  
For the following conditions unless otherwise specified:  
V
DD  
= 2.7V at Tamb = 25°C and V = 3.0V to 5.5V at Tamb = -40 to +85°C,  
DD  
Xtal Frequency = 3.579545MHz ± 0.1%, 0dBm corresponds to 775mVrms.  
DC Parameters  
(Zero Power mode)  
Notes  
1, 2  
1
Min.  
-
-
-
-
-
70%  
-
-1.0  
Typ.  
1.0  
3.4  
1.8  
3.5  
1.9  
-
Max.  
-
6.0  
3.2  
6.2  
3.4  
-
Unit  
I
µA  
mA  
mA  
mA  
mA  
DD  
(Running, TXON o/p Off, V = 5.0V)  
(Running, TXON o/p Off, V = 3.3V)  
(Running, TXON o/p On, V = 5.0V)  
(Running, TXON o/p On, V = 3.3V)  
DD  
1
1
1
3
DD  
DD  
DD  
Logic '1' Input Level  
Logic '0' Input Level  
Logic Input Leakage Current (Vin = 0 to V ),  
V
V
DD  
3
-
-
30%  
+1.0  
DD  
µA  
DD  
(excluding XTAL/CLOCK input)  
V
-0.4  
-
-
-
-
-
-
-
V
V
µA  
V
Output Logic '1' Level (l = 360µA)  
DD  
OH  
0.4  
1.0  
0.56V  
+ 0.6V  
0.44V  
Output Logic '0' Level (l = 360µA)  
OL  
IRQN O/P 'Off' State Current (Vout = V  
Schmitt trigger input high-going threshold (Vthi)  
(see Figure 11)  
Schmitt trigger input low-going threshold (Vtlo)  
(see Figure 11)  
)
DD  
0.56V  
DD  
DD  
DD  
0.44V  
- 0.6V  
-
-
V
DD  
RLYDRV ‘ON’ resistance to V (V = 5.0V)  
38.0  
TBD  
SS  
DD  
Notes:  
1. At 25°C, not including any current drawn from the CMX624 pins by external circuitry other  
than X1, C1 and C2.  
2. All logic inputs at V except for RT and CSN inputs which are at V  
.
SS  
DD  
3. Excluding RD, RT and XTAL/CLOCK pins.  
FSK Modulator and Tx UART  
Level at TOP pin.  
Twist (Mark level WRT Space level)  
Tx 1200bits/sec (V.23 mode)  
Baud Rate (set by UART and Xtal frequency)  
Mark (Logical 1) Frequency  
Notes  
Min.  
-4.0  
-2.0  
Typ.  
-3.0  
0
Max.  
-2.0  
+2.0  
Unit  
dBm  
dB  
4
1194  
1297  
2097  
1200  
1300  
2100  
1206  
1303  
2103  
Baud  
Hz  
Hz  
Space (Logical 0) Frequency  
Tx 75bits/sec (V.23 mode)  
Baud Rate (set by UART and Xtal frequency)  
Mark (Logical 1) Frequency  
Space (Logical 0) Frequency  
74  
388  
448  
75  
390  
450  
76  
392  
452  
Baud  
Hz  
Hz  
Tx 1200bits/sec (Bell 202 mode)  
Baud Rate (set by UART and Xtal frequency)  
Mark (Logical 1) Frequency  
1194  
1197  
2197  
1200  
1200  
2200  
1206  
1203  
2203  
Baud  
Hz  
Hz  
Space (Logical 0) Frequency  
Tx 150bits/sec (Bell 202 mode)  
Baud Rate (set by UART and Xtal frequency)  
Mark (Logical 1) Frequency  
149  
385  
485  
150  
387  
487  
151  
389  
489  
Baud  
Hz  
Hz  
Space (Logical 0) Frequency  
Notes:  
4. At V = 5.0V, Tx o/p level control bit set to ‘1’; load resistance greater than 40k.  
DD  
2003 CML Microsystems Plc  
20  
D/624/7