V22 and Bell 212A Modem
CMX644A
1.5
1.5.1
General Description
‘C-BUS’ Interface
This block provides for the transfer of data and control or status information between the CMX644A’s internal
registers and the µC over the ‘C-BUS’ serial bus. Each transaction, see Figure 3, consists of a single Register
Address byte sent from the µC which may be followed by a single data byte sent from the µC to be written into
one of the CMX644A’s Write Only Registers, or a single byte of data read out from one of the CMX644A’s
Read Only Registers.
Data sent from the µC on the Command Data line is clocked into the CMX644A on the rising edge of the
Serial Clock input. Reply Data sent from the CMX644A to the µC is valid when the Serial Clock is high. The
interface is compatible with the most common µC serial interfaces such as SCI, SPI and Microwire, and may
also be easily implemented with general purpose µC I/O pins controlled by a simple software routine. See
section 1.7.1 and Figure 9 for detailed ‘C-BUS’ timing requirements.
Figure 3 ‘C-BUS’ Transactions
©
2000
Consumer Microcircuits Limited
7
D/644A/6
CMLMICRO [ CML MICROCIRCUITS ]
