Baseband Signal Processor
8
MX829 PRELIMINARY INFORMATION
5.2 Write Only Register Description
5.2.1 RESET Register (Hex address $01)
The reset command has no data attached to it. It sets the device registers into the specific states as listed below:
REGISTER NAME
CONTROL 1
CONTROL 2
CONTROL 3/IRQ ENABLE
AUDIO ATTENUATION
TXDATA
MOD LEVELS (1)
MOD LEVELS (2)
RX SYNC WORD (1)
RX SYNC WORD (2)
STATUS
RXDATA
BIT 7
(D7)
0
0
0
0
X
0
0
X
X
0
X
BIT 6
(D6)
0
0
0
0
X
0
0
X
X
0
X
BIT 5
(D5)
0
0
0
0
X
0
0
X
X
0
X
BIT 4
(D4)
0
0
0
0
X
0
0
X
X
0
X
BIT 3
(D3)
0
0
0
0
X
0
0
X
X
0
X
BIT 2
(D2)
0
0
0
0
X
0
0
X
X
0
X
BIT 1
(D1)
0
0
0
0
X
0
0
X
X
0
X
BIT 0
D0)
0
0
0
0
X
0
0
X
X
0
X
X = undefined
5.2.2 CONTROL1 Register (Hex address $10)
This register is used to control the functions of the device as described below:
AMP1
(Bit 7)
AMP2
(Bit 6)
AUDIO
(Bit 5)
MSKRX
(Bit 4)
When this bit is "1", AMP1 is enabled.
When this bit is "0", AMP1 is disabled (i.e. powersaved).
When this bit is "1", both AMP2 and MOD2 are enabled.
When this bit is "0", both AMP2 and MOD2 are disabled (i.e. powersaved) and the MOD2 output is
pulled to V
BIAS
via a 1M: resistor.
When this bit is "1", the audio filter/limiter section is enabled.
When this bit is "0", the audio filter/limiter section is disabled (i.e. powersaved).
When this bit is "1", the MSK Rx is enabled.
When this bit is "0", the MSK Rx is disabled (i.e. powersaved).
Note:
The MSK Rx and Tx cannot both be enabled at the same time. If both MSKRX and MSKTX are "1", then they will
both be disabled (i.e. powersaved).
MSKTX
(Bit 3)
When this bit is "1", the MSK Tx is enabled.
When this bit is "0", the MSK Tx is disabled (i.e. powersaved).
Note:
The MSK Tx and Rx cannot both be enabled at the same time. If both MSKTX and MSKRX are "1", then they will
both be disabled (i.e. powersaved).
The DTMF Encoder and MSK Tx cannot both be enabled at the same time. If both DTMFEN and MSKTX are "1",
then they will both be disabled.
UK/F
(Bit 2)
MIC
(Bit 1)
B/W
(Bit 0)
When this bit is "1", the SYNC/SYNT is set to the PAA standard of "1011010000110011" (SYNC)
When this bit is "0", the SYNC/SYNT is set to the MPT standard of "1100010011010111" (SYNC)
When this bit is "1", the MIC input is enabled and the AMP1 (DEMODIN) input is disabled.
When this bit is "0", the AMP1 (DEMODIN) input is enabled and the MIC input is disabled.
When this bit is "1", the bandwidth of the audio path is set wide for 20kHz/25kHz RF channel spacing.
When this bit is "0", the bandwidth of the audio path is set narrow for 12.5kHz RF channel spacing.
© 1998 MX•COM Inc.
www.mxcom.com Tele: 800 638-5577 336 744-5050 Fax: 336 744-5054
Doc. # 20480160.004
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies.
CMLMICRO [ CML MICROCIRCUITS ]
