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CY2310ANZPVC-1 参数 Datasheet PDF下载

CY2310ANZPVC-1图片预览
型号: CY2310ANZPVC-1
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V的SDRAM缓冲区用于移动PC与4 SO- DIMM内存模块 [3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs]
分类和应用: 动态存储器PC
文件页数/大小: 8 页 / 188 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY2310ANZ
Pin Summary
Name
V
DD
V
SS
V
DDIIC
V
SSIIC
BUF_IN
OE
SDATA
SCLK
SDRAM [0–3]
SDRAM [4–7]
SDRAM [8–9]
Pins
1, 5, 10, 19, 24, 28
4, 8, 12, 17, 21, 25
13
16
9
20
14
15
2, 3, 6, 7
22, 23, 26, 27
11, 18
Description
3.3V Digital voltage supply
Ground
Serial interface voltage supply
Ground for serial interface
Input clock
Output Enable, three-states outputs when LOW. Internal pull-up to V
DD
Serial data input, internal pull-up to V
DD
Serial clock input, internal pull-up to V
DD
SDRAM byte 0 clock outputs
SDRAM byte 1 clock outputs
SDRAM byte 2 clock outputs
Device Functionality
OE
0
1
SDRAM [0–17]
High-Z
1 x BUF_IN
Serial Configuration Map
• The Serial bits will be read by the clock driver in the following
order:
Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0
.
Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0
• Reserved and unused bits should be programmed to “0”.
• Serial interface address for the CY2310ANZ is:
Byte 1: SDRAM Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
A6
1
A5
1
A4
0
A3
1
A2
0
A1
0
A0
1
R/W
----
Bit 2
Bit 1
Bit 0
Byte 0:SDRAM Active/Inactive Register
(1 = Enable, 0 = Disable), Default = Enabled
Bit
Pin #
Initialize to 0
Initialize to 0
Initialize to 0
Initialize to 0
SDRAM3 (Active/Inactive)
SDRAM2 (Active/Inactive)
SDRAM1 (Active/Inactive)
SDRAM0 (Active/Inactive)
Description
Bit 7 --
Bit 6 --
Bit 5 --
Bit 4 --
Bit 3 7
Bit 2 6
Bit 1 3
Bit 0 2
Pin #
27
26
23
22
--
--
--
--
Description
SDRAM7 (Active/Inactive)
SDRAM6 (Active/Inactive)
SDRAM5 (Active/Inactive)
SDRAM4 (Active/Inactive)
Initialize to 0
Initialize to 0
Initialize to 0
Initialize to 0
Byte 2: SDRAM Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
18
11
--
--
--
--
--
--
Description
SDRAM9 (Active/Inactive)
SDRAM8 (Active/Inactive)
Reserved, drive to 0
Reserved, drive to 0
Reserved, drive to 0
Reserved, drive to 0
Reserved, drive to 0
Reserved, drive to 0
Document #: 38-07142 Rev. *B
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