CY7C130/CY7C131
CY7C140/CY7C141
Switching Characteristics
Over the Operating Range
[6,11]
(continued)
7C130-35
7C131-35
7C140-35
7C141-35
Parameter
t
HZCE
t
PU
t
PD
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
SD
t
HD
t
HZWE
t
LZWE
t
BLA
t
BHA
t
BLC
t
BHC
t
PS
t
WB[17]
t
WH
t
BDD
t
DDD
t
WDD
Description
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
R/W Pulse Width
Data Set-Up to Write End
Data Hold from Write End
R/W LOW to High Z
R/W HIGH to Low Z
BUSY LOW from Address Match
BUSY HIGH from Address Mismatch
BUSY LOW from CE LOW
BUSY HIGH from CE HIGH
Port Set Up for Priority
R/W LOW after BUSY LOW
R/W HIGH after BUSY HIGH
BUSY HIGH to Valid Data
Write Data Valid to Read Data Valid
Write Pulse to Data Delay
5
0
30
35
Note
Note
25
25
25
25
25
25
0
20
20
20
20
5
0
35
45
Note
Note
35
35
35
35
35
35
35
30
30
2
0
25
15
0
20
0
25
25
25
25
5
0
35
45
Note
Note
45
45
45
45
45
45
0
35
45
35
35
2
0
30
20
0
20
0
30
30
30
30
Min.
Max.
20
0
35
55
40
40
2
0
30
20
0
25
7C130-45
7C131-45
7C140-45
7C141-45
Min.
Max.
20
0
35
7C130-55
7C131-55
7C140-55
7C141-55
Min.
Max.
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WRITE CYCLE
BUSY/INTERRUPT TIMING
INTERRUPT TIMING
t
WINS
t
EINS
t
INS
t
OINR
t
EINR
t
INR
R/W to INTERRUPT Set Time
CE to INTERRUPT Set Time
Address to INTERRUPT Set Time
OE to INTERRUPT Reset Time
CE to INTERRUPT Reset Time
Address to INTERRUPT Reset Time
ns
ns
ns
ns
ns
ns
Document #: 38-06002 Rev. *D
Page 7 of 19
CYPRESS [ CYPRESS SEMICONDUCTOR ]
