DS1855
The DS1855 is capable of an 8-byte page write. A page write is initiated the same way as a byte write, but
the master does not send a STOP condition after the first byte. Instead, after the slave acknowledges
receipt of the data byte, the master can send up to seven more bytes using the same nine-clock sequence.
The master must terminate the write cycle with a STOP condition or the data clocked into the DS1855
will not be latched into permanent memory.
Acknowledge Polling
Once the internally timed write has started and the DS1855 inputs are disabled, acknowledge polling can
be initiated. The process involves transmitting a START condition followed by the device address. The
R/W bit signifies the type of operation that is desired. The read or write sequence will only be allowed to
proceed if the internal write cycle has completed and the DS1855 responds with a zero.
Read Operations
After receiving a matching address byte with the R/W bit set high, the device goes into the read mode of
operation. There are three read operations: current address read, random read, and sequential address
read.
CURRENT ADDRESS READ
The DS1855 has an internal address register that maintains the address used during the last read or write
operation, incremented by one. This data is maintained as long as V
CC
is valid. If the most recent address
was the last byte in memory, the register resets to the first address. This address stays valid between
operations as long as power is available.
Once the device address is clocked in and acknowledged by the DS1855 with the R/W bit set to high, the
current address data word is clocked out. The master does not respond with a zero, but does generate a
STOP condition afterwards.
RANDOM READ
A random read requires a dummy-byte write sequence to load in the data word address. Once the device
and data address bytes are clocked in by the master and acknowledged by the DS1855, the master must
generate another START condition. The master now initiates a current address read by sending the device
address with the read/write bit set high. The DS1855 acknowledges the device address and serially clocks
out the data byte.
SEQUENTIAL ADDRESS READ
Sequential reads are initiated by either a current address read or a random address read. After the master
receives the first data byte, the master responds with an acknowledge. As long as the DS1855 receives
this acknowledge after a byte is read, the master may clock out additional data words from the DS1855.
After reaching address FFh, it resets to address 00h.
The sequential read operation is terminated when the master initiates a STOP condition. The master does
not respond with a zero.
For a more detailed description of 2-wire theory of operation, refer to the next section.
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DALLAS [ DALLAS SEMICONDUCTOR ]
