DS1855
1. Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the master is
the command/control byte. Next, follows a number of data bytes. The slave returns an acknowledge
bit after each received byte.
2. Data transfer from a slave transmitter to a master receiver. The master transmits the first byte (the
command/control byte) to the slave. The slave then returns an acknowledge bit. Next, follows a
number of data bytes transmitted by the slave to the master. The master returns an acknowledge bit
after all received bytes other than the last byte. At the end of the last received byte, a ‘not
acknowledge’ can be returned.
The master device generates all serial clock pulses and the START and STOP conditions. A transfer is
ended with a STOP condition or with a repeated START condition. Since a repeated START condition is
also the beginning of the next serial transfer, the bus will not be released.
The DS1855 may operate in the following two modes:
1.
Slave receiver mode:
Serial data and clock are received through SDA and SCL, respectively. After
each byte is received, an acknowledge bit is transmitted. START and STOP conditions are recognized
as the beginning and end of a serial transfer. Address recognition is performed by hardware after
reception of the slave (device) address and direction bit.
2.
Slave transmitter mode:
The first byte is received and handled as in the slave receiver mode.
However, in this mode the direction bit will indicate that the transfer direction is reversed. Serial data
is transmitted on SDA by the DS1855 while the serial clock is input on SCL. START and STOP
conditions are recognized as the beginning and end of a serial transfer.
3.
Slave Address:
Command/control byte is the first byte received following the START condition from
the master device. The command/control byte consists of a 4-bit control code. For the DS1855, this is
set as
1010
binary for read/write operations. The next 3 bits of the command/control byte are the
device select bits or slave address (A2, A1, A0). They are used by the master device to select which
of eight devices is to be accessed. When reading or writing to the DS1855, the device-select bits must
match the device-select pins (A2, A1, A0). The last bit of the command/control byte (R/W) defines
the operation to be performed. When set to a 1 a read operation is selected, and when set to a 0 a write
operation is selected.
Following the START condition, the DS1855 monitors the SDA bus by checking the device type
identifier being transmitted. Upon receiving the
1010
control code, the appropriate device address bits,
and the R/W bit, the slave device outputs an acknowledge signal on the SDA line.
WRITE PROTECT
An external write-protect (WP) pin protects EEPROM data and potentiometer position from alteration in
an application. If this pin is open or tied high, the EEPROM content, which includes the potentiometer
settings, is protected from alteration. If no activity occurs on the SDA and SCL pins, this part will be held
in a low-power mode. The EEPROM and potentiometer settings may be read if WP is set, but they cannot
be written under any circumstances unless WP is taken to GND.
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DALLAS [ DALLAS SEMICONDUCTOR ]
