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DS2152L 参数 Datasheet PDF下载

DS2152L图片预览
型号: DS2152L
PDF下载: 下载PDF文件 查看货源
内容描述: 增强型T1单芯片收发器 [Enhanced T1 Single-Chip Transceiver]
分类和应用: 电信集成电路
文件页数/大小: 94 页 / 1000 K
品牌: DALLAS [ DALLAS SEMICONDUCTOR ]
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DS2152
Enhanced T1 Single-Chip Transceiver
www.dalsemi.com
FEATURES
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Complete DS1/ISDN-PRI transceiver
functionality
Line interface can handle both long and short haul
trunks
32-bit or 128-bit crystal-less jitter attenuator
Generates DSX-1 and CSU line build outs
Frames to D4, ESF, and SLC-96
R
formats
Dual onboard two-frame elastic store slip buffers
that can connect to asynchronous backplanes up to
8.192 MHz
8-bit parallel control port that can be used directly
on either multiplexed or non-multiplexed buses
(Intel or Motorola)
Extracts and inserts robbed-bit signaling
Detects and generates yellow (RAI) and blue
(AIS) alarms
Programmable output clocks for Fractional T1
Fully independent transmit and receive
functionality
Integral HDLC controller with 16-byte buffers for
the FDL
Generates and detects in-band loop codes from 1
to 8 bits in length including CSU loop codes
Contains ANSI 1's density monitor and enforcer
Large path and line error counters including BPV,
CV, CRC6, and framing bit errors
Pin compatible with DS2154 E1 Enhanced Single-
Chip Transceiver
5V supply; low power CMOS
100-pin 14mm
2
body LQFP package
PIN ASSIGNMENT
100
1
ORDERING INFORMATION
DS2152L
DS2152LN
(0°C to 70°C)
(-40°C to +85°C)
DESCRIPTION
The DS2152 T1 Enhanced Single-Chip Transceiver contains all of the necessary functions for connection
to T1 lines, whether they be DS-1 long haul or DSX-1 short haul. The clock recovery circuitry
automatically adjusts to T1 lines from 0 feet to over 6000 feet in length. The device can generate both
DSX-1 line build outs as well as CSU line build outs of -7.5 dB, -15 dB, and -22.5 dB. The onboard jitter
attenuator (selectable to either 32 bits or 128 bits) can be placed in either the transmit or receive data
paths. The framer locates the frame and multiframe boundaries and monitors the data stream for alarms. It
is also used for extracting and inserting robbed-bit signaling data and FDL data. The device contains a set
of internal registers which the user can access and control the operation of the unit. Quick access via the
parallel control port allows a single controller to handle many T1 lines. The device fully meets all of the
latest T1 specifications including ANSI T1.403-1995, ANSI T1.231-1993, AT&T TR 62411 (12-90),
AT&T TR54016, and ITU G.703, G.704, G.706, G.823, and I.431.
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