DS2167/DS2168
SERIAL PORT WRITE
All port writes are initiated by driving CS low and termi-
nated when CS returns high.
Data is sampled on the ris-
ing edge of SCLK and must be written to the device LSB
first.
Writes to the device may be two bytes (address/
command and control) or four bytes (address/com-
mand, control, input timeslot and output timeslot) in
length. Writes should be terminated on byte boundaries
to insure data integrity. PCM and ADPCM outputs will
tristate during register updates.
SERIAL PORT WRITE
Figure 9
CS
SCLK
SDI
1
A0
A1
A2
A3
A4
A5
X/Y
–
CR0 CR1 CR2 CR3 CR4
A0
A1
NOTE:
1. 2-byte write shown.
8051-BASED CONTROL SYSTEM
Figure 10
8051 CONTROLLER
P1.0 RXD TXD
POWER-ON
RESET
(DS1231)
RST
TM0
TM1
A0
DS2167/68 #0
A1
A2
A3
A4
A5
SPS
MCLK
VSS
VDD
YIN
CLKY
FSY
YOUT
CS
SDI
SCLK
XOUT
FSX
CLKX
XIN
RST
TM0
TM1
A0
A1
A2
A3
A4
A5
SPS
MCLK
VSS
DS2167/68 #1
VDD
YIN
CLKY
FSY
YOUT
CS
SDI
SCLK
XOUT
FSX
CLKX
XIN
RST
TM0
TM1
A0
A1
A2
A3
A4
A5
SPS
MCLK
VSS
DS2167/68 #63
VDD
YIN
CLKY
FSY
YOUT
CS
SDI
SCLK
XOUT
FSX
CLKX
XIN
10 MHz
CLOCK
PCM DATA HI-WAY “Y”
PCM DATA HI-WAY “X”
ÉÉÉÉ
É
ÉÉÉÉ
É
A2
022698 9/15
DALLAS [ DALLAS SEMICONDUCTOR ]
