DS2506
follow the 1-Wire protocol detailed in the section “1-Wire Bus System.” The memory functions required
to read and program the EPROM sections of the DS2506 are not accessible until the ROM function
protocol has been satisfied. This protocol is described in the ROM functions flow chart (Figure 8). The
1-Wire bus master must first provide one of six ROM function commands: 1) Read ROM, 2) Match
ROM, 3) Search ROM, 4) Skip ROM, 5) Overdrive-Skip ROM or 6) Overdrive-Match ROM. After a
ROM function sequence has been successfully executed, the bus master may then provide any one of the
memory function commands specific to the DS2506 (Figure 5).
The 1-Wire CRC of the lasered ROM is generated using the polynomial X8 + X5 + X4 + 1. Additional
information about the Dallas Semiconductor 1-Wire Cyclic Redundancy Check is available in the Book
of DS19xx iButton Standards. The shift register acting as the CRC accumulator is initialized to zero.
Then starting with the least significant bit of the family code, 1 bit at a time is shifted in. After the 8th bit
of the family code has been entered, then the serial number is entered. After the 48th bit of the serial
number has been entered, the shift register contains the CRC value. Shifting in the 8 bits of CRC should
return the shift register to all zeroes.
DS2506 BLOCK DIAGRAM Figure 1
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DALLAS [ DALLAS SEMICONDUCTOR ]
