DS2506
HIERARCHICAL STRUCTURE FOR 1-WIRE PROTOCOL
Figure 2
64-BIT LASERED ROM
Figure 3
8-Bit CRC Code
MSB
LSB MSB
48-Bit Serial Number
8-Bit Family Code (0FH)
LSB MSB
LSB
65536-BITS EPROM
The memory map in Figure 4 shows the 65536-bit EPROM section of the DS2506 which is configured as
256 pages of 32 bytes each. The 8-bit scratchpad is an additional register that acts as a buffer when
programming the memory. Data is first written to the scratchpad and then verified by reading an 16-bit
CRC from the DS2506 that confirms proper receipt of the data and address. If the buffer contents are
correct, a programming voltage should be applied and the byte of data will be written into the selected
address in memory. This process insures data integrity when programming the memory. The details for
reading and programming the 65536-bit EPROM portion of the DS2506 are given in the Memory
Function Commands section.
EPROM STATUS BYTES
In addition to the 65536 bits of data memory the DS2506 provides 2816 bits of Status Memory accessible
with separate commands.
The EPROM Status Bytes can be read or programmed to indicate various conditions to the software
interrogating the DS2506. The first 32 bytes of the EPROM Status Memory (addresses 000 to 01FH)
contain the Write Protect Page bits which inhibit programming of the corresponding page in the 65536-bit
main memory area if the appropriate write protection bit is programmed. Once a bit has been
programmed in the Write Protect Page section of the Status Memory, the entire 32 byte page that
corresponds to that bit can no longer be altered but may still be read.
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DALLAS [ DALLAS SEMICONDUCTOR ]
