DS21352/DS21552
2.列出表
表4-1引脚说明排序方式的PIN号码........................................ ........................ 11
排序方式PIN符号表4-2引脚说明........................................ ........................ 14
表5-1寄存器映射按地址排序......................................... .................................. 29
表6-1器件ID位图.............................................................................................................33
表6-2输出引脚测试模块.......................................... .................................................. ..... 36
表7-1 T1接收电平指示.......................................... ........................................... 47
表7-2报警标准................................................................................................................49
表8-1线路代码违例票安排......................................... ..... 53
表8-2 PATH违章点票安排......................................... .... 54
表8-3多帧不同步计数ARRANGMENTS ..................................... 55
初始化后表14-1弹性缓存延迟......................................... ............. 67
表14-2最小延迟模式配置.......................................... ...................... 67
表15-1 TRANSMIT HDLC配置........................................... .................................... 68
表15-2 HDLC / BOC控制寄存器......................................... ................................. 70
表16-1 LINE打造出选择LICR ........................................ ......................................... 86
表16-2发送变选择............................................ ........................... 87
表16-3互感器规格............................................ ...................................... 88
表16-4脉冲模板角点.......................................... .................................... 90
表16-5接收MONITOR模增益.......................................... .......................................... 95
表17-1传送程序LENGTH...............................................................................................97
表17-2接收代码长度........................................... .................................................. ..... 97
表19-1指令代码IEEE 1149.1架构....................................... 104
表19-2 ID代码结构.....................................................................................................105
表19-3设备识别码............................................................................................................105
表19-4边界扫描控制BITS .......................................... .................................... 106
表20-1主设备总线进行.......................................... ........................................... 110
6 137