3D3622
APPLICATION NOTES (CONT’D)
t
TW
TRIG
t
ID
OUT
OUTB
t
PW
t
RTO
Figure 2: Timing Diagram (RES=0)
t
TW
TRIG
t
RW
RES
t
RTR
t
ID
OUT
OUTB
t
RD
Figure 3: Timing Diagram (with reset)
AE
t
ES
SC
t
CW
t
CW
t
EH
t
DH
t
DS
SI
SO
TRIG
A21
A20
A19
A1
A0
t
EV
OLD A21 OLD A20
t
CQ
OLD A19
OLD A18
OLD A0
t
EX
A21
t
AT
t
OA
OUT
Figure 4: Address Update
SI
3D3622
SC
AE
SO
SI
3D3622
SC
AE
SO
SI
3D3622
AE
SO
FROM
SERIAL
SOURCE
SC
TO
NEXT
DEVICE
Figure 5: Cascading Multiple Devices
Doc #06008
5/8/2006
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
4