3D7215
APPLICATION NOTES (CONT’D)
pulse width. Therefore, to facilitate production
and device identification, the
part number will
include a custom reference designator
identifying the intended frequency and duty cycle
of operation. The programmed delay accuracy of
the device is guaranteed, therefore, only for the
user specified input characteristics. Small input
pulse width variation about the selected pulse
width will only marginally impact the programmed
delay accuracy, if at all.
Nevertheless, it is
strongly recommended that the engineering
staff at DATA DELAY DEVICES be consulted.
and innovative compensation circuitry to
minimize the delay variations induced by
fluctuations in power supply and/or temperature.
The
thermal coefficient
is reduced to
200
PPM/C,
which is equivalent to a variation , over
the 0C-70C operating range, of
±1%
from the
room-temperature delay settings and/or
1.0ns,
whichever is greater. The
power supply
coefficient
is reduced, over the 4.75V-5.25V
operating range, to
±0.5%
of the delay settings at
the nominal 5.0VDC power supply and/or
0.5ns,
whichever is greater.
It is essential that the
power supply pin be adequately bypassed
and filtered. In addition, the power bus
should be of as low an impedance
construction as possible. Power planes are
preferred.
POWER SUPPLY AND
TEMPERATURE CONSIDERATIONS
The delay of CMOS integrated circuits is strongly
dependent on power supply and temperature.
The monolithic 3D7215 delay line utilizes novel
DEVICE SPECIFICATIONS
TABLE 2: ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Supply Voltage
Input Pin Voltage
Input Pin Current
Storage Temperature
Lead Temperature
SYMBOL
V
DD
V
IN
I
IN
T
STRG
T
LEAD
MIN
-0.3
-0.3
-1.0
-55
MAX
7.0
V
DD
+0.3
1.0
150
300
UNITS
V
V
mA
C
C
NOTES
25C
10 sec
TABLE 3: DC ELECTRICAL CHARACTERISTICS
(-40C to 85C, 4.75V to 5.25V)
PARAMETER
Static Supply Current*
Input Threshold Voltage
High Level Input Current
Low Level Input Current
High Level Output Current
Low Level Output Current
Output Rise & Fall Time
SYMBOL
I
DD
V
TH
I
IH
I
IL
I
OH
I
OL
T
R
& T
F
MIN
2.2
MAX
1.5
2.8
1
1
-4.0
UNITS
mA
V
µA
µA
mA
mA
2
ns
NOTES
4.0
V
IH
= V
DD
V
IL
= 0V
V
DD
= 5.0V
V
OH
= 4.0V
V
DD
= 5.0V
V
OL
= 0.4V
C
LD
= 5 pf
*I
DD
(Dynamic) = 5 * C
LD
* V
DD
* F
where: C
LD
= Average capacitance load/tap (pf)
F = Input frequency (GHz)
Input Capacitance = 10 pf typical
Output Load Capacitance (C
LD
) = 25 pf max
Doc #01015
11/8/01
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
DATADELAY [ DATA DELAY DEVICES, INC. ]
