DM9161
10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver
5.2 Media Interface, 5 pins
Pin No.
3,4
7,8
45
Pin Name
RX+/FXRD+
RX-/FXRD-
TX+/FXTD+
TX-/FXTD-
SD
I/O
Description
I Differential receive pair.
Differential data is received from the media.
Differential Pseudo ECL signal is received from the media in fiber mode.
O Differential transmit pair.
Differential data is transmitted to the media in TP mode.
Differential Pseudo ECL signal transmits to the media in fiber mode.
I Fiber-optic signal detect
PECL signal which indicates whether or not the fiber-optic receive pair is
receiving valid signal levels.
5.3 LED Interface, 3 pins
Pin No.
11
I/O
Description
O, Full/Half Duplex LED
LI Active states indicate the full-duplex mode. Active states see LED
(U) configuration
Full-Duplex/Collision LED: when bit 5 of register 16 is set high
Active states indicate the full-duplex mode or activity Collision LED when
in the half-duplex mode. Active states see LED configuration
OP0: (power up reset latch input)
This pin is used to control the forced or advertised operating mode of the
DM9161 according to the Table A. The value is latched into the DM9161
registers at power-up/reset
SPEED LED# O, Speed LED
/OP1
LI Active states indicate the 100Mbps mode. Active states see LED
(U) configuration
When bit 6 of Register 16 is set high, it controls the SPEED LED as
100Base-TX SD signal output. For debug only
OP1: (power up reset latch input)
This pin is used to control the forced or advertised operating mode of the
DM9161 according to the Table A. The value is latched into the DM9161
registers at power-up/reset
LINK
O, Link LED & Activity LED:
/ACT LED#
LI Active states indicate the good link for 10Mbps and 100Mbps operations.
/OP2
(U) It is also an active LED function when transmitting or receiving data.
Active states see LED configuration
OP2: (power up reset latch input)
This pin is used to control the forced or advertised operating mode of the
DM9161 according to the Table A. The value is latched into the DM9161
registers at power-up/reset
Pin Name
FDX
/COL LED#
/OP0
12
13
8
Final
Version: DM9161-DS-F05
September 10, 2008
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
