DM9301FP
100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter
LED Interface(Continued)
52
TXERRLED#
OD
TX Error LED:
Indicates an error was detected by the TX Code Group
Alignment Monitor function on the TX receiver. Active
low (Open Drain Output)
The DM9301FP incorporates a "monostable" function on
the TXERRLED output. This ensures that even
minimum size errors generate adequate LED ON to
insure visibility.
FX Interface Analog Loop Back:
Loops the FX NRZI analog transmit data path to the FX
NRZI analog receive path.
Initiated at an H/W reset. Active high.
TX Interface Analog Loop Back:
Loops the TX NRZI analog transmit data path to the TX
NRZI analog receive path.
Initiated at an H/W reset. Active high.
FX Interface Digital Loop Back:
Loops the FX 5-bit symbol digital transmit data path to
the FX 5-bit symbol digital receive path.
Initiated at an H/W reset. Active high.
TX Interface Digital Loop Back:
Loops the TX 5-bit symbol digital transmit data path to
the TX 5-bit symbol digital receive path.
Initiated at an H/W reset. Active high.
Receive Data 4 through 0:
The receive data 5-bit symbol interface. Data is clocked
out on the falling edge of RXCLK.
Receive Clock:
25 MHz recovered clock, clock source is selected by the
MUXCTL1 and MUXCTL0.
Transmit Data 4 through 0:
The transmit data 5-bit symbol interface. Data is clocked
in on the rising edge of TXCLK.
Transmit Clock:
25 MHz recovered clock, clock source is selected by the
MUXCTL1 and MUXCTL0.
Diagnostic Port Interface
36
FXALPBK
I
35
TXALPBK
I
96
FXDLPBK
I
97
TXDLPBK
I
79, 77,
76, 74,
73
70
48, 47,
45, 44,
43
71
RXD0, RXD1,
RXD2, RXD3,
RXD4
RXCLK
TXD0, TXD1,
TXD2, TXD3,
TXD4
TXCLK
0
O
I
O
Final
Version: DM9301FP-DS-F03
June 06, 2007
7
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
