DI2CS
I C Bus Interface - Slave
ver 3.02
OVERVIEW
I
2
C is a two-wire, bi-directional serial bus that
provides a simple and efficient method of
data transmission over a short distance be-
tween many devices. The DI2CS core pro-
vides an interface between a microprocessor
/microcontroller and an I
2
C bus. It can works
as a slave transmitter or slave receiver de-
pending on working mode determined by a
master device. The DI2CS core incorporates
all features required by the latest I
2
C specifi-
cation including clock synchronization, arbi-
tration and High-speed transmission mode.
The DI2CS supports all the transmission
speed modes.
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Fully synthesizable
Static synchronous design with positive
edge clocking and synchronous reset
No internal tri-states
Scan test ready
2
APPLICATIONS
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Embedded microprocessor boards
Consumer and professional audio/video
Home and automotive radio
Low-power applications
Communication systems
Cost-effective reliable automotive sys-
tems
KEY FEATURES
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Conforms to v.2.1 of the I
2
C specification
Slave operation
Slave transmitter
Slave receiver
DELIVERABLES
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Source code:
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VHDL Source Code or/and
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VERILOG Source Code or/and
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Encrypted, or plain text EDIF netlist
VHDL & VERILOG test bench environ-
ment
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Active-HDL automatic simulation mac-
ros
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ModelSim automatic simulation macros
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Tests with reference responses
Technical documentation
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Installation notes
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HDL core specification
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Datasheet
Synthesis scripts
Example application
Technical support
http://www.DigitalCoreDesign.com
http://www.dcd.pl
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Supports 3 transmission speed modes
Standard (up to 100 kb/s)
Fast (up to 400 kb/s)
High Speed (up to 3,4 Mb/s)
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Allows operation from a wide range of
input clock frequencies
Simple interface allows easy connection
to microprocessor/microcontroller devices
Interrupt generation
User-defined data setup time
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Copyright 1999-2007 DCD – Digital Core Design. All Rights Reserved.
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