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EDD1208ALTA-1A 参数 Datasheet PDF下载

EDD1208ALTA-1A图片预览
型号: EDD1208ALTA-1A
PDF下载: 下载PDF文件 查看货源
内容描述: 128 M位同步DRAM是双倍数据速率( 4 -银行, SSTL_2 ) [128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2)]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 78 页 / 1650 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EDD1204ALTA, EDD1208ALTA, EDD1216ALTA
CONTENTS
1. Input/Output Pin Function....................................................................................................................................10
2. Commands ............................................................................................................................................................11
3. Simplified State Diagram......................................................................................................................................15
4. Truth Table ............................................................................................................................................................16
4.1 Command Truth Table...............................................................................................................................16
4.2 DM Truth Table ..........................................................................................................................................16
4.3 CKE Truth Table ........................................................................................................................................16
4.4 Operative Command Table
Note1
................................................................................................................17
4.5 Command Truth Table for CKE .................................................................................................................20
5. Initialization ...........................................................................................................................................................21
6. Programming the Mode Register.........................................................................................................................22
7. Mode Register .......................................................................................................................................................23
7.1 Burst Length and Sequence ......................................................................................................................24
8. Address Bits of Bank-Select and Precharge ......................................................................................................25
9. Precharge ..............................................................................................................................................................26
9.1 Read to Precharge Command Interval ......................................................................................................26
9.2 Write to Precharge Command Interval ......................................................................................................27
10. Auto Precharge ...................................................................................................................................................28
10.1 Read with Auto Precharge.......................................................................................................................28
10.2 Write with Auto Precharge.......................................................................................................................29
11. Read/Write Command Interval ...........................................................................................................................30
11.1 Read to Read Command Interval ............................................................................................................30
11.2 Write to Write Command Interval ............................................................................................................31
11.3 Write to Read Command Interval ............................................................................................................32
11.4 Read to Write Command Interval ............................................................................................................33
8
Preliminary Data Sheet E0136E30