EDE1104AASE, EDE1108AASE
-6E
Frequency (Mbps)
Parameter
Active to auto-precharge delay
Active bank A to active bank B
command period
Write recovery time
Auto precharge write recovery +
precharge time
Internal write to read command
delay
Internal read to precharge
command delay
Exit self refresh to a non-read
command
Exit self refresh to a read
command
Exit precharge power down to
any non-read command
Exit active power down to read
command
Exit active power down to read
command
(slow exit/low power mode)
CKE minimum pulse width (high
and low pulse width)
Output impedance test driver
delay
Auto refresh to active/auto
refresh command time
Average periodic refresh interval
(0°C
≤
TC
≤
+85°C)
(+85°C
<
TC
≤
+95°C)
Minimum time clocks remains
ON after CKE asynchronously
drops low
Symbol
tRAP
tRRD
tWR
tDAL
tWTR
tRTP
tXSNR
tXSRD
tXP
tXARD
667
min.
max.
-5C
533
min.
max.
-4A
400
min.
max.
Unit
ns
ns
ns
tCK
ns
ns
ns
tCK
tCK
tCK
tCK
tCK
ns
ns
µs
µs
ns
3
2, 3
1
Notes
tRCD min.
7.5
15
tRCD min.
7.5
15
tRCD min.
7.5
15
(tWR/tCK)
+
(tRP/tCK)
7.5
7.5
(tWR/tCK)+
(tRP/tCK)
7.5
7.5
(tWR/tCK)+
(tRP/tCK)
10
7.5
tRFC
+
10
200
2
2
12
7.8
3.9
tRFC + 10
200
2
2
6
−
AL
3
0
127.5
12
7.8
3.9
tRFC + 10
200
2
2
6
−
AL
3
0
127.5
12
7.8
3.9
tXARDS 7
−
AL
tCKE
tOIT
tRFC
tREFI
tREFI
tDELAY
3
0
127.5
tIS
+
tCK
+
tIH
tIS + tCK +
tIH
tIS + tCK +
tIH
Notes: 1.
2.
3.
4.
For each of the terms above, if not already an integer, round to the next higher integer.
AL: Additive Latency.
MRS A12 bit defines which active power down exit timing to be applied.
The figures of Input Waveform Timing 1 and 2 are referenced from the input signal crossing at the
VIH(AC) level for a rising signal and VIL(AC) for a falling signal applied to the device under test.
5. The figures of Input Waveform Timing 1 and 2 are referenced from the input signal crossing at the
VIH(DC) level for a rising signal and VIL(DC) for a falling signal applied to the device under test.
CK
/CK
DQS
/DQS
tDS
tDH
tDS
tDH
VDDQ
VIH (AC)(min.)
VIH (DC)(min.)
VREF
VIL (DC)(max.)
VIL (AC)(max.)
VSS
tIS
tIH
tIS
tIH
VDDQ
VIH (AC)(min.)
VIH (DC)(min.)
VREF
VIL (DC)(max.)
VIL (AC)(max.)
VSS
Input Waveform Timing 1 (tDS, tDH)
Input Waveform Timing 2 (tIS, tIH)
Data Sheet E0404E20 (Ver. 2.0)
13