欢迎访问ic37.com |
会员登录 免费注册
发布采购

EDJ1104BFSE-AE-F 参数 Datasheet PDF下载

EDJ1104BFSE-AE-F图片预览
型号: EDJ1104BFSE-AE-F
PDF下载: 下载PDF文件 查看货源
内容描述: 1G位DDR3 SDRAM [1G bits DDR3 SDRAM]
分类和应用: 存储内存集成电路动态存储器双倍数据速率
文件页数/大小: 147 页 / 1783 K
品牌: ELPIDA [ ELPIDA MEMORY ]
 浏览型号EDJ1104BFSE-AE-F的Datasheet PDF文件第1页浏览型号EDJ1104BFSE-AE-F的Datasheet PDF文件第2页浏览型号EDJ1104BFSE-AE-F的Datasheet PDF文件第3页浏览型号EDJ1104BFSE-AE-F的Datasheet PDF文件第5页浏览型号EDJ1104BFSE-AE-F的Datasheet PDF文件第6页浏览型号EDJ1104BFSE-AE-F的Datasheet PDF文件第7页浏览型号EDJ1104BFSE-AE-F的Datasheet PDF文件第8页浏览型号EDJ1104BFSE-AE-F的Datasheet PDF文件第9页  
EDJ1104BFSE, EDJ1108BFSE
CONTENTS
Specifications.................................................................................................................................................1
Features.........................................................................................................................................................1
Ordering Information......................................................................................................................................2
Part Number ..................................................................................................................................................2
Pin Configurations .........................................................................................................................................3
Electrical Conditions ......................................................................................................................................6
Absolute Maximum Ratings .......................................................................................................................... 6
Operating Temperature Condition ................................................................................................................ 6
Recommended DC Operating Conditions (TC = 0°C to +85°C, VDD, VDDQ = 1.5V
±
0.075V) ................... 7
AC and DC Input Measurement Levels (TC = 0°C to +85°C, VDD, VDDQ = 1.5V
±
0.075V)....................... 7
VREF Tolerances ......................................................................................................................................... 8
Input Slew Rate Derating .............................................................................................................................. 9
AC and DC Logic Input Levels for Differential Signals ................................................................................ 15
AC and DC Output Measurement Levels (TC = 0°C to +85°C, VDD, VDDQ = 1.5V
±
0.075V) .................. 20
AC Overshoot/Undershoot Specification..................................................................................................... 22
Output Driver Impedance............................................................................................................................ 23
On-Die Termination (ODT) Levels and I-V Characteristics ......................................................................... 25
ODT Timing Definitions............................................................................................................................... 27
IDD Measurement Conditions (TC = 0°C to +85°C, VDD, VDDQ = 1.5V
±
0.075V) ................................... 31
Electrical Specifications...............................................................................................................................44
DC Characteristics 1 (TC = 0°C to +85°C, VDD, VDDQ = 1.5V
±
0.075V) ................................................. 44
DC Characteristics 2 (TC = 0°C to +85°C, VDD, VDDQ = 1.5V
±
0.075V) ................................................. 45
Pin Capacitance (TC = 25°C, VDD, VDDQ = 1.5V
±
0.075V) ..................................................................... 46
Standard Speed Bins .................................................................................................................................. 47
AC Characteristics (TC = 0°C to +85°C, VDD, VDDQ = 1.5V
±
0.075V, VSS, VSSQ = 0V)....................... 50
Block Diagram .............................................................................................................................................63
Pin Function.................................................................................................................................................64
Command Operation ...................................................................................................................................66
Command Truth Table ................................................................................................................................ 66
CKE Truth Table ......................................................................................................................................... 70
Simplified State Diagram .............................................................................................................................71
RESET and Initialization Procedure ............................................................................................................72
Power-Up and Initialization Sequence ........................................................................................................ 72
Reset and Initialization with Stable Power .................................................................................................. 73
Programming the Mode Register.................................................................................................................74
Mode Register Set Command Cycle Time (tMRD) ..................................................................................... 74
MRS Command to Non-MRS Command Delay (tMOD) ............................................................................. 74
DDR3 SDRAM Mode Register 0 [MR0] ...................................................................................................... 75
DDR3 SDRAM Mode Register 1 [MR1] ...................................................................................................... 76
Preliminary Data Sheet E1653E20 (Ver. 2.0)
4