EM78452
8-Bit Microcontroller
Bit 2 (SPIIE) SPI interrupt enable bit.
0 : disable SPI interrupt
1 : enable SPI interrupt
Bit 1 (EXIE) EXIF interrupt enable bit.
0 : disable EXIF interrupt
1 : enable EXIF interrupt
Bit 0 (TCIE) TCIF interrupt enable bit.
0 : disable TCIF interrupt
1 : enable TCIF interrupt
Table 2 Related Status/Data Registers of the SPI Mode
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0X0A
0x0B
0x0C
SPIRB/RA SRB7 SRB6 SRB5 SRB4 SRB3 SRB2 SRB1 SRB0
SPIWB/RB SWB7 SWB6 SWB5 SWB4 SWB3 SWB2 SWB1 SWB0
SPIS/RC DORD
TD1
TD0
TM1IF
OD3
OD4
-
RBF
SPIRB:
SPI Read Buffer. Once the serial data is received completely, it will be
loaded to SPIRB from SPISR. The RBF bit and the RBFIF bit in the SPIS
register will also be set.
SPIWB:
SPI Write Buffer. As transmitted data is loaded, the SPIS register stands
by and start to shift the data when sensing SCK edge with SSE set to
“1”.
SPIS: SPI Status register
Bit 7 (DORD): Read Buffer Full Interrupt flag
0 : Shift left (MSB first)
1 : Shift right (LSB first)
Bit 6~Bit 5: SDO Status Output Delay Times Options
TD1
0
TD0
0
Delay Time
8 CLK
16 CLK
24 CLK
32 CLK
0
1
1
0
1
1
24 •
Product Specification (V1.0) 10.18.2007
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
