EM83040B
LCD CONTROLLER
m in ar y
Preli
Address 2560,2561
2562 Control register
Address 2560,2561,2562
Control register
address2559 ...................
address2547 ......................................................................................................................... address2528
COM80
Area 11
EMPTY AREA
LCD RAM
Area 10
COM64
address2047 ...................
:
:
:
:
address2035 ......................................................................................address2019...............address2016
Area 9
Area 7
:
:
:
:
Area 8
Area 5
COM48
address1535 ...................
:
:
address1523 ............................................................address1511........................................address1504
:
Area 6
:
address1023 ...................
:
:
address1011 .......................address1003 ............................................................................. address0992
COM32
Area 4
Area 3
:
Area 2
:
Area 1
COM2
COM1
address0063 ...................
address0031 ...................
address0051 ................... ..................................... .......................... ................................... address0032
address0019 ................... address0011................ address7........... address0003............... address0000
b3 b2 b1 b0 ...................
s80s79s78s77
s48
s32
s16
b3 b2 b1 b0
s4 s3 s2 s1
Fig.5
As same as write mode , user has to sent address three times. And read data from RAM one by one which
address can be increased by internal counter. NOTE!! Be sure to make RAMR low pulse 2
µS
(Tdv+data)
width and 2
µS
(Tdd) high width at least.
(5) RAM mapping
RAM address is from 0 to address 2559
User fill “1” to LCD RAM , LCD driver will generate “light” waveform. Otherwise , it will generate a
“dark” waveform. The LCD RAM area is mapped to segment 1 to segment 80 from address 0 to address
19. And user can refer to fig.5 to get the idea of LCD ram mapping. The other RAM can use as general
RAM for data storage. And the RAM of address 2560 is a control register.
* This specification are subject to be changed without notice.
9.14.2001
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