EM4450
EM4550
Memory Organisation
The 1024 bit EEPROM is organised in 32 words of 32 bits. The first three words are assigned to the Password, the
Protection word, and the Control word. In order to write one of these three words, it is necessary to send the valid
password. At fabrication, the EM4450/4550 comes with all bits of the password programmed to a logic "0". The Password
cannot be read out. The memory contains two extra words of Laser ROM. These words are laser programmed during
fabrication for every chip, are unique and cannot be altered.
Memory Map
Bit 0
Word 0
1
3
928 Bits of USER
EEPROM
31
32
33
DEVICE SERIAL NUMBER
DEVICE IDENTIFICATION
Laser
Laser
------------------------------
PASSWORD
PROTECTION WORD
CONTROL WORD
Bit 31
EE
EE
EE
EE
Control Word
0–7
First Word Read
8 – 15
Last Word Read
16
Password Check On/Off
17
Read After Write On/Off
18 – 31
User available
Protection Word
0–7
First Word Read Protected
8 – 15
Last Word Read Protected
16 – 23
First Word Write Inhibited
24 – 31
Last Word Write Inhibited
Password
Write Only – No Read Access
Device Identification Word &
Serial Number Word
Laser Programmed – Read only
Fig.5
On means bit set to logic '1'
Off means bit set to logic '0'
Standard Read Mode
After a Power-On-Reset and upon completion of a command, the chip will execute the Standard Read Mode, in which it will
send data continuously, word by word from the memory section defined between the First Word Read (FWR) and Last
Word Read (LWR). When the last word is output, the chip will continue with the first word until the transceiver sends a
request. If FWR and LWR are the same, the same word will be sent repetitively. The Listen Window (LIW) is generated
before each word to check if the transceiver is sending data. The LIW has a duration of 320 (160 opt 32) periods of the RF
field. FWR and LWR have to be programmed as valid addresses (FWR
≤
LWR and
≤
33).
The words sent by the EM4450/4550 comprise 32 data bits and parity bits. The parity bits are not stored in the EEPROM,
but generated while the message is sent as described below. The parity is even for rows and columns, meaning that the
total number of "1's" is even (including the parity bit).
Word organisation (Words 0 to 33)
First bit output
D0
D8
D16
D24
PC0
D1
D9
D17
D25
PC1
D2
D10
D18
D26
PC2
D3
D11
D19
D27
PC3
D4
D12
D20
D28
PC4
Data
D5
D13
D21
D29
PC5
D6
D14
D22
D30
PC6
Row Even Parity
D7
D15
D23
D31
PC7
P0
P1
P2
P3
0
Column Even Partiy
Last bit output
logic '0'
Fig. 6
When a word is read protected, the output will consist of 45 bits set to logic "0". The password has to be used to output
correctly a read protected memory area.
Copyright
2003, EM Microelectronic-Marin SA
5
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EMMICRO [ EM MICROELECTRONIC - MARIN SA ]
