EM6603
6.5
PortC
This port can be configured as either input or output (not bitwise selectable). When in input mode it implements
the identical interrupt functions as PortA. The
PortC
register is used to read data when input mode and to write
data when in output mode. Input mode is set by writing 0 to the I/O control bit
CIOPC
in register
CPIOB
and the
input becomes high impedance. On each terminal Pull-Up/Down resistor can be selected by metal option which
are active only when selected as input.
The output mode is selected by writing 1 to
CIOPC
bit, and the terminal follows the bits in the
PortC
register.
When PortC is used as an input, interrupt functions as described for PortA can be enabled. Input to the interrupt
logic can be direct or via a debounced input. With the
debPCN
bit at 0 in the Option register all the PortC inputs
are debounced and with the
debPCN
bit at 1 none of the PortC inputs are debounced.
MPortC
is the interrupt
mask register for this port and
IRQpC
is the portC interrupt request register. See also section 9.
By writing the
PA&C
bit in the
CPIOB
data register it is
possible to combine PortA and PortC interrupt
requests (logic AND) as shown in Table 16.
At initial reset, the
CPIOC
control register is set to 0,
and the port is in input mode. The
MPortC
register is
also set to 0, therefore disabling interrupts.
Table 16.Ports A&C Interrupt Request
IRQPA IRQPC PA&C Request to CPU
0
0
X
No
0
1
0
Yes
1
0
0
Yes
1
1
0
Yes
0
1
1
No
1
0
1
No
1
1
1
Yes
6.6
PortC registers
Table 17.PortC input/output register - PortC
Bit
3
2
1
0
Name
PC3
PC2
PC1
PC0
Reset
-
-
-
-
R/W
R/W
R /W
R/W
R /W
Description
PC3 I/O data
PC2 I/O data
PC1 I/O data
PC0 I/O data
Table 18.PortC Interrupt request register - IRQpC
Bit
3
2
1
0
Name
IRQpc3
IRQpc2
IRQpc1
IRQpc0
Reset
0
0
0
0
R/W
R
R
R
R
Description
input PC3 interrupt request flag
input PC2 interrupt request flag
input PC1 interrupt request flag
input PC0 interrupt request flag
Table 19.PortC interrupt mask register - MportC
Bit
3
2
1
0
Name
MPC3
MPC2
MPC1
MPC0
Reset
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
interrupt mask for input PC3
interrupt mask for input PC2
interrupt mask for input PC1
interrupt mask for input PC0
03/02 REV. G/439
Copyright
2002, EM Microelectronic-Marin SA
12
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