EN5337QI
ripple voltage.
1
Z
Total
1
1
1
=
+
+
...
+
Z
1
Z
2
Z
n
Recommended Output Capacitors
Description
47uF, 6.3V, 20%
X5R, 1206
(1 capacitor needed)
10uF, 6.3V, 10%
X5R, 0805
(Optional 1 capacitor in
parallel with 47uF above)
MFG
Murata
Taiyo Yuden
Murata
Taiyo Yuden
P/N
GRM31CR60J476ME19L
JMK212BJ476ML-T
GRM21BR60J106KE19L
JMK212BJ106KG-T
Typical Ripple Voltages
Output Capacitor
Configuration
1 x 47 uF
47 uF + 10 uF
Typical Output Ripple (mVp-p)
(as measured on EN5335QI
Evaluation Board)
30
15
Power-Up Sequencing
During power-up, ENABLE should not be
asserted before PVIN, and PVIN should not be
asserted before AVIN. Tying all three pins
together meets these requirements.
Thermal Considerations
The Enpirion EN5337QI DC-DC converter is
packaged in a 7 x 4 x 1.85mm 38-pin QFN
package. The QFN package is constructed
with copper lead frames that have exposed
thermal pads. The recommended maximum
junction temperature for continuous operation
is 125°C. Continuous operation above 125°C
will reduce long-term reliability. The device has
a thermal overload protection circuit designed
to shut it off at an approximate junction
temperature value of 150°C.
The silicon is mounted on a copper thermal
pad that is exposed at the bottom of the
package. The thermal resistance from the
silicon to the exposed thermal pad is very low.
In order to take advantage of this low
resistance, the exposed thermal pad on the
package should be soldered directly on to a
copper ground pad on the printed circuit board
(PCB). The PCB then acts as a heat sink. In
order for the PCB to be an effective heat sink,
the device thermal pad should be coupled to
copper ground planes or special heat sink
structures designed into the PCB (refer to the
recommendations at the end of this note).
The junction temperature, T
J
, is calculated from
the ambient temperature, T
A
, the device power
dissipation, P
D
, and the device junction-to-
ambient thermal resistance,
θ
JA
in °C/W::
T
J
= T
A
+ (P
D
)(θ
JA
)
©Enpirion
2009 all rights reserved, E&OE
02638
The junction temperature, T
J
, can also be
expressed in terms of the device case
temperature, T
C
, and the device junction-to-
case thermal resistance,
θ
JC
in °C/W, as
follows:
T
J
= T
C
+ (P
D
)(θ
JC
)
The device case temperature, T
C
, is the
temperature at the center of the exposed
thermal pad at the bottom of the package.
The device junction-to-ambient and junction-to-
case thermal resistances,
θ
JA
and
θ
JC
, are
shown in the Thermal Characteristics table on
page 3. The
θ
JC
is a function of the device and
the 38-pin QFN package design. The
θ
JA
is a
function of
θ
JC
and the user’s system design
parameters
that
include
the
thermal
effectiveness of the customer PCB and airflow.
The
θ
JA
value shown in the Thermal
Characteristics table on page 3 is for free
convection with the device heat sunk (through
the thermal pad) to a copper plated four-layer
PC board with a full ground and a full power
plane following JEDEC EIJ/JESD 51
Standards. The
θ
JA
can be reduced with the
use of forced air convection. Because of the
strong
dependence
on
the
thermal
effectiveness of the PCB and the system
design, the actual
θ
JA
value will be a function of
the specific application.
www.enpirion.com
Rev:D
10
6/18/2009
ENPIRION [ ENPIRION, INC. ]
