EN6337QI
The θJA value shown in the Thermal
Characteristics table on page 3 is for free
convection with the device heat sunk (through
the thermal pad) to a copper plated four-layer
PC board with a full ground and a full power
Standard. The θJA can be reduced with the use
of forced air convection. Because of the strong
dependence on the thermal effectiveness of
the PCB and the system design, the actual θJA
value will be a function of the specific
application.
plane
following
EIA/JEDEC
JESD51-7
Layout Recommendations
Figure 7 shows critical components and layer 1
traces of a recommended minimum footprint
EN6337QI layout with ENABLE tied to VIN in
PWM mode. Alternate ENABLE configurations,
and other small signal pins need to be
connected and routed according to specific
customer application. Please see the Gerber
files on the Enpirion website www.enpirion.com
for exact dimensions and other layers. Please
refer to this Figure while reading the layout
recommendations in this section.
Recommendation 1: Input and output filter
capacitors should be placed on the same side
of the PCB, and as close to the EN6337QI
package as possible. They should be
connected to the device with very short and
wide traces. Do not use thermal reliefs or
spokes when connecting the capacitor pads to
the respective nodes. The +V and GND traces
between the capacitors and the EN6337QI
should be as close to each other as possible
so that the gap between the two nodes is
minimized, even under the capacitors.
Figure 7: Top PCB Layer Critical Components
and Copper for Minimum Footprint
The drill diameter of the vias should be
0.33mm, and the vias must have at least 1 oz.
copper plating on the inside wall, making the
finished hole size around 0.20-0.26mm. Do not
use thermal reliefs or spokes to connect the
vias to the ground plane. This connection
provides the path for heat dissipation from the
converter. Please see Figures: 7, 8, and 9.
Recommendation 2: Three PGND pins are
dedicated to the input circuit, and three to the
output circuit. The slit in Figure 7 separating
the input and output GND circuits helps
minimize noise coupling between the converter
input and output switching loops.
Recommendation 5: Multiple small vias (the
same size as the thermal vias discussed in
recommendation 4 should be used to connect
ground terminal of the input capacitor and
output capacitors to the system ground plane.
It is preferred to put these vias under the
capacitors along the edge of the GND copper
closest to the +V copper. Please see Figure 7.
These vias connect the input/output filter
capacitors to the GND plane, and help reduce
parasitic inductances in the input and output
current loops. If the vias cannot be placed
under CIN and COUT, then put them just outside
the capacitors along the GND slit separating
the two components. Do not use thermal reliefs
or spokes to connect these vias to the ground
plane.
Recommendation 3: The system ground
plane should be the first layer immediately
below the surface layer. This ground plane
should be continuous and un-interrupted below
the converter and the input/output capacitors.
Please see the Gerber files on the Enpirion
website www.enpirion.com.
Recommendation 4: The large thermal pad
underneath the component must be connected
to the system ground plane through as many
vias as possible.
©Enpirion 2011 all rights reserved, E&OE
14
www.enpirion.com
05800
6/17/2011
Rev: B
ENPIRION [ ENPIRION, INC. ]
