EN29F002A / EN29F002AN
TABLE 1. PIN DESCRIPTION
Pin Name
A0-A17
DQ0-DQ7
Function
Addresses
Data Input/Outputs
Chip Enable
Output Enable
Write Enable
Hardware Reset
Sector Unprotect
Supply Voltage
(5V
±
10% )
Ground
CE
OE
WE
RESET
N/A on EN29F002AN
FIGURE 1. LOGIC DIAGRAM
Vcc
18
A0 - A17
EN29F002AT/B
8
DQ0 - DQ7
CE
OE
WE
RESET
(n/a for
EN29F002AN)
Vcc
Vss
Vss
TABLE 2. BLOCK ARCHITECTURE
TOP BOOT BLOCK
SECTOR
6
5
4
3
2
1
0
BOTTOM BOOT BLOCK
ADDRESSES
30000h - 3FFFFh
20000h - 2FFFFh
10000h - 1FFFFh
08000h - 0FFFFh
06000h - 07FFFh
04000h - 05FFFh
00000h - 03FFFh
SIZE (Kbytes)
64
64
64
32
8
8
16
ADDRESSES
3C000h - 3FFFFh
3A000h - 3BFFFh
38000h - 39FFFh
30000h - 37FFFh
20000h - 2FFFFh
10000h - 1FFFFh
00000h - 0FFFFh
SIZE (Kbytes)
16
8
8
32
64
64
64
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
2
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. A, Issue Date: 2003/03/26