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EPC701-QFN16 参数 Datasheet PDF下载

EPC701-QFN16图片预览
型号: EPC701-QFN16
PDF下载: 下载PDF文件 查看货源
内容描述: 24V / 50毫安通用输出驱动器 [24V/50mA General-Purpose Output-Driver]
分类和应用: 驱动器
文件页数/大小: 11 页 / 264 K
品牌: EPC [ ESPROS PHOTONICS CORP ]
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epc700/epc702
Absolute Maximum Ratings
(Note 1)
Power Supply Voltage V
DD
Maximum Power Dissipation
Storage Temperature Range (T
S
)
Lead Temperature solder, 4 sec. (T
L
)
-0.3 to +36.0 V (Note 2)
100mW
-40°C to +85°C
+260°C
Operating Temperature (T
O
)
Humidity (non-condensing)
-40°
+5
+85°
+95
C
%
Recommended Operating Conditions
Min.
Power Supply Voltage (V
DD
)
9.6
Max.
30
Units
V
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended operating conditions indi-
cate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifica -
tions and test conditions, see Electrical Characteristics.
Note 2:
Supply voltages up to 36 Volts may be present for 10 seconds only.
Note 3:
This device is a highly sensitive CMOS amplifier with an ESD rating of JEDEC HBM class 1C (>1kV). Handling and assembly of this
device should only be done at ESD protected workstations.
Electrical Characteristics
V
DD
= 9.6V < V
DD
< 30V, -40°C < T
A
< +85°C
Symbol
Parameter
Conditions/Comments
Min.
V
DD
ΔV
DD
I
DD
V
OUT
V
Sat
I
SENS
V
SENS
I
Peak
V
Status
Supply Voltage
Ripple on Supply Voltage
Supply Current
Output Voltage
Output Saturation Voltage
Sens Current
Current Sens Voltage
Short Circuit Peak Current
Status Output
@50mA output current
Current trigger threshold
Over-current trigger threshold voltage (by using an external
power switch)
Initial current during a short circuit (<1ms, 50Ω series resistor)
Logical high
Logical low
Sink driving capability
f
Status
V
IN
Status Output Frequency
Input
epc702 only, duty cycle 50%
Logical high
Logical low
Hysteresis
Pull-down resistance
P
DIS
t
ON
t
OFF
t
del
Power Dissipation
Response Time
Response Time
Off-delay Time
On-chip power dissipation
On
Off
Time between over-current detection and STATUS/OUT
change (default value), refer to section Programming
Programmable off-delay values
t
minOFF
Recovery Time
Minimum down time of the OUT pin to protect the external
transistor (default value), refer to section Programming
Programmable values
f
rt
t
STARTUP
C
L_max
Short circuit recovery delay t
minoff
/t
delay
= f
rt
(when used without external driver transistor,
time factor
refer to section “Over-current Reset Sequence”)
Start-up time
VDD ramp > 100 V/ms
30
40.0
1.0
0.7
50.0
2
-0.3
-8
1.5
2.0
-0.3
0.25
100
150
200
100
1.2
1.0
60.0
μs
5/10/20/50/100/200/500/1,000
400
500
600
ms
mW
μs
μs
-10
1.7
-50
0.18
Peak-Peak
no load
0
1
-60
0.2
300
9.6
Values
Typ.
Max.
30
10
400
30
2
-70
0.25
-0.5
5.5
0.8
-12
1.9
5.5
0.8
V
Units
V
%V
DD
μA
V
V
mA
V
A
V
mA
Hz
10/20/50/100/200/500/1,000/
1,500
1,000
200
μs
nF
External Load Capacitance Load capacitance that can be driven through OUT without
triggering over-current @2kOhm load and 5μs delay time
© 2011 ESPROS Photonics Corporation
Characteristics subject to change without notice
2
Datasheet epc700_702 - V2.2
www.espros.ch