epc700/epc702
Application Information
epc700 and epc702 have two modes of operation, where the SENS pin is used to define the mode. When SENS is tied to VDD, the chip
operates as a sink driver capable to sink max. 50mA at 30VDC (refer to Figure 6). The load is connected directly between V
L
and the OUT pin.
If the current through the internal switch exceeds I
SENS
, the switch is turned off.
If the SENS pin is at low level, the OUT pin is driven by a source driver also capable to drive 50mA into an external power transistor. This
mode is used if the required output current has to be higher than 50mA, e.g. 1A and the output voltage exceeds 30VDC (refer to Figure 7).
The load current is measured by monitoring the voltage drop over a resistor. If the internal switch is used, also the current measurement
resistor is located internally (Figure 6). In the case of using an external power transistor as shown in Figure 7, the current measurement
resistor R
S
has to be placed externally. If the voltage drop at R
S
exceeds the threshold of 200 mV, the output stage is deactivated. The timing
diagrams of the signals can be found in section “Functional Description”.
The IN signal must be low during power-up (t
STARTUP
) for proper function of the chip. The epc70x has a built in pull down resistor, so not
external active driving is needed during startup.
epc700 or epc702 Using the Internal Switch
mode, the SENS pin has to be connected to VDD. Note that the VDD of the chip and
V
L
at the load can have a different value. The values for both VDD and V
L
need to be
between 9.6 and 30V.
The factor f
rt
between minimum off-time and delay-time must be maintained in order
not to damage the chip due to overheating. This factor has to be higher than 1,000. In
the worst case scenario a peak current of approx. 0.5A is flowing from V
L
at 30V into
the chip with a t
Del
set at 50μs if a short-circuit occurs. If the recovery time t
minoff
in this
case is smaller then 50ms, the average power dissipation would exceed the safe
operation condition and the device will get damaged.
The diode D
1
is to protect the internal switch against voltage surges when inductive
loads are turned off.
R1 is to protect the internal switch in case of a short circuit on the load when a very
low impedance power supply is used.
The voltage V
L
can be higher than VDD in this configuration. However, it must not be
above the maximum value of 'Supply Voltage' stated in the table Electrical Characte-
ristics.
VDD
V
L
≤VDD max
VDD
D
L
R
L
epc700
epc702
OUT
IN
STATUS
GND
SENSE
R1≥50Ω
GND
Figure 6: epc700 or epc702 using the internal switch
to drive a load of up to 50mA /30VDC
epc700 or epc702 Using an External Switching Transistor
1
in order to extend the
V
L
≤VDD max
VDD
output current/voltage drive capability. In this example, a bipolar transistor is used,
whereas the base current is limited by the resistor R
B
. The maximum base current is
50mA. In order not to damage the chip, the user has to select the resistor R
B
such that
chip does not need to drive more than 50mA. Other possible switches are a NPN BJT
D
L
R
L
VDD
or an n-channel MOSFET.
epc700
epc702
The load is turned on and off by setting the pin IN to high respectively to low level.
R1≥50Ω
V
L
VDD
VDD
D
L
R
L
epc700
epc702
OUT
IN
STATUS
GND
SENSE
R1
When the load is turned on, the
OUT
current flows from V
L
through the resistor R
S
and
load
through the transistor T
1
to GND. This current creates a voltage drop over R
S
. The
resulting voltage is
IN
applied to pin SENS, which measures the voltage drop. If it
exceeds the threshold of an internal comparator, set to 200mV, the output is turned off
STATUS
SENSE
after the given delay time t
del
.
GND
T1
R
T
C
T
R
SENSE
If the delay time should be extended to a value above the possible settings of t
del
(refer
to Table 3), an RC network can added, designated as R
T
and C
T
in Figure 7. The
additional time delay t
ext
GND
be calculated approx. as R
T
x C
T
. However, the
File: Unbenannt
can
time
This document is confidential and protected by law and international trades. It must not be shown to any third party nor be copied in any
GND
varies according to the current through R
S
. This design concept is especially useful,
Figure 7: epc700 or epc702 operation mode
when a large capacitor in the load path needs to be charged. The additional delay in
using an external switching transistor.
the over-current detection helps in such a situation.
In case of a short-circuit in the load the turn-off delay
Note that the VDD of the chip and V
L
on the load are different in most of the applica-
can be extended by an external RC network.
tions. The value of VDD must be between 9.6 and 30V. V
L
instead, can be on a level
This network adds t
ext
to the internal delay t
del
.
which is appropriate to the external switching transistor.
The diode D
1
is to protect the transistor T
1
against voltage surges when inductive loads are turned off.
© 2011 ESPROS Photonics Corporation
Characteristics subject to change without notice
6
Datasheet epc700_702 - V2.2
www.espros.ch
Dieter Kägi
25.05.2011
Page 1
EPC [ ESPROS PHOTONICS CORP ]
