DATA SHEET
ASIC
S1L50000
LINE UP
The S1L50000 Series comprises 11 types of masters, from which the customer is able to select
the master most suitable.
Total
BC
Number
of
Number
of
Number
of
Cell Utilization Ratio (U)*1
2-layer 3-layer 4-layer
Master
(Raw Gates)
Pads
88
Columns (X) Rows (Y)
metal
50%
47%
47%
45%
45%
45%
43%
40%
40%
40%
40%
metal
88%
85%
85%
80%
75%
75%
75%
70%
70%
70%
70%
metal
95%
95%
95%
95%
95%
95%
95%
90%
90%
90%
90%
S1L50282/283/284
S1L50752/753/754
S1L50992/993/994
S1L51252/253/254
S1L51772/773/774
S1L52502/503/504
S1L53352/353/354
S1L54422/423/424
S1L55062/063/064
S1L56682/683/684
S1L58152/153/154
28710
75774
99198
319
519
90
144
168
188
224
264
308
352
376
432
480
146
167
188
223
265
307
352
377
433
478
594
669
125772
177062
250160
335858
442112
506688
668552
815468
794
944
1094
1256
1344
1544
1706
NOTE: *1: This is the value when there are no cells, such as RAM cells. The cell use efficiency is dependent not only on the scope of
the circuits, but also on the number of signals, the number of branches per signal, etc.; thus, use the values in this table only
as an estimate
2
EPSON ELECTRONICS AMERICA, INC.
150 River Oaks Pkwy
San Jose, CA 95134
Tel: (408) 922-0200
Fax: (408) 922-0238