PIN DESCRIPTION/SPECIFICATIONS
5.2.5. LCD drive signals
In order to provide effective low-power drive for LCD
matrixes, the S1D13305 series can directly control both
the X- and Y-drivers using an enable chain.
Pin Name
Function
4-bit X-driver (column drive) data outputs. Connect these outputs to the inputs of the X-driver
chips.
XD0 to XD3
The falling edge of XSCL latches the data on XD0 to XD3 into the input shift registers of the
X-drivers. To conserve power, this clock halts between LP and the start of the following display
line (See section 6.3.7).
XSCL
The falling edge of XECL triggers the enable chain cascade for the X-drivers.
Every 16th clock pulse is output to the next X-driver.
XECL
LP latches the signal in the X-driver shift registers into the output data latches. LP is a falling-
edge triggered signal, and pulses once every display line.
LP
Connect LP to the Y-driver shift clock on modules.
LCD panel AC drive output. The WF period is selected to be one of two values with SYSTEM
SET command.
WF
The falling edge of YSCL latches the data on YD into the input shift registers of the
Y-drivers. YSCL is not used with driver ICs which use LP as the Y-driver shift clock.
YSCL
YD is the data pulse output for the Y drivers. It is active during the last line of each frame, and
is shifted through the Y drivers one by one (by YSCL), to scan the display’s common
connections.
YD
Power-down output signal. YDIS is HIGH while the display drive outputs are active.
YDIS goes LOW one or two frames after the sleep command is written to the S1D13305
series. All Y-driver outputs are forced to an intermediate level (de-selecting the display
segments) to blank the display. In order to implement power-down operation in the LCD unit,
the LCD power drive supplies must also be disabled when the display is disabled by YDIS.
YDIS
6. SPECIFICATIONS
6.1. Absolute Maximum Ratings
Parameter
Supply voltage range
Symbol
Rating
–0.3 to 7.0
–0.3 to VDD + 0.3
300
Unit
V
VDD
Input voltage range
VIN
V
Power dissipation
PD
mW
°C
°C
°C
Operating temperature range
Storage temperature range
Soldering temperature (10 seconds). See note 1.
T
opg
stg
solder
–20 to 75
–65 to 150
260
T
T
Notes:
1. The humidity resistance of the flat package may be reduced if the package is immersed in solder. Use a soldering technique
that does not heatstress the package.
2. If the power supply has a high impedance, a large voltage differential can occur between the input and supply voltages. Take
appropriate care with the power supply and the layout of the supply lines. (See section 6.2.)
3. All supply voltages are referenced to VSS = 0V.
S1D13305 Series
Technical Manual
EPSON
7
EPSON [ EPSON COMPANY ]
