EliteMT
READ WRITE CYCLE
(LATE WRITE and READ-MODIFY-WRITE CYCLES)
t
RWC
t
RAS
RAS
V
IH
V
IL
M11B416256A
t
RP
t
CSH
t
RS H
t
CAS
t
CRP
CASL,CASH
V
IH
V
IL
t
RCD
t
CLCH
t
ASR
ADDR
V
IH
V
IL
ROW
t
AR
t
RAD
t
RAH
t
ASC
COLUMN
t
RAL
t
CAH
ROW
t
RCS
V
IH
V
IL
t
RWD
t
CWD
t
AWD
t
CWL
t
RWL
t
WP
WE
t
AA
t
RAC
t
CAC
t
CLZ
I/O
V
I/O H
V
I/O L
OPEN
VAL ID D
O UT
t
DS
t
DH
VALI D D
IN
t
O AC
OE
V
IH
V
IL
t
OFF 2
t
OEH
EDO-PAGE-MODE READ CYCLE
t
RASC
RAS
V
IH
V
IL
t
RP
t
CRP
CASL ,C AS H
V
IH
V
IL
t
CSH
t
RCD
t
CAS ,
t
CLCH
t
PC
(NOTE2)
t
CAS,
t
CLCH
t
CP
t
CP
t
RSH
t
CAS,
t
CLCH
t
CP
t
AR
t
RAD
t
ASR
t
RAH
ADDR
V
IH
V
IL
ROW
t
RAL
t
AS C
t
CAH
COLUMN
t
ASC
t
CAH
t
ASC
t
CAH
ROW
COLUMN
COLUMN
t
RCS
WE
V
IH
V
IL
t
RCH
t
RRH
t
AA
t
RAC
t
CAC
t
CLZ
I/O
V
O H
V
O L
OPEN
t
AA
t
ACP
t
CAC
t
COH
VAL ID D ATA
VALID
DATA
t
AA
t
ACP
t
CAC
t
CLZ
t
OEHC
t
O AC
t
OFF 2
t
OES
t
OEP
VAL ID D ATA
NO TE1
t
OFF1
OPEN
t
O AC
t
OES
t
OFF 2
OE
V
IH
V
IL
DON'T CARE
UNDEFINED
*NOTE : 1. t
OFF1
is referenced from the rising edge of
RAS
or
CAS
, whichever occurs last.
2.
t
PC
can be measured from falling edge of
CAS
to falling edge of
CAS
, or from rising edge of
CAS
to rising
edge of
CAS
. Both measurements must meet the t
PC
specification.
Elite Memory Technology Inc
Publication Date
:
Feb. 2004
Revision
:
1.9
9/15
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
