ESMT
makes Hi-Z state the data-out of 2 CLK cycles after.(Read DQM latency is 2)
M52D128168A
Operation Temperature Condition -40°C~85°C
MODE REGISTER FIELD TABLE TO PROGRAM MODES
Register Programmed with MRS
Address
Function
BA0
0
BA1
0
A11
0
A10/AP
0
A9
0
A8
0
A7
0
A6
A5
A4
A3
BT
A2
A1
A0
CAS Latency
Burst Length
Test Mode
A8
0
0
1
1
A7
0
1
0
1
Type
Mode Register Set
Reserved
Reserved
Reserved
A6
0
0
0
0
1
1
1
1
CAS Latency
A5
0
0
1
1
0
0
1
1
A4
0
1
0
1
0
1
0
1
Latency
Reserved
Reserved
2
3
Reserved
Reserved
Reserved
Reserved
Burst Type
A3
0
1
Type
Sequential
Interleave
A2
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
Burst Length
A0
0
1
0
1
0
1
0
1
BT = 0
1
2
4
8
BT = 1
1
2
4
8
Reserved Reserved
Reserved Reserved
Reserved Reserved
Full Page Reserved
Full Page Length : 512
Elite Semiconductor Memory Technology Inc.
Publication Date: Sep. 2008
Revision: 1.0
8/47
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
