EtronTech
T0
T1
T2
T3
CLK
DQM
2Mega x 32 SDRAM
T4
T5
T6
EM638325
T7
T8
COM MAND
NOP
READ A
NOP
NOP
NOP
NOP
WRITE B
NOP
NOP
DQ's
DOUT A0
Must be Hi-Z before
the Write Command
DI NB 0
DINB1
DI NB 2
: "H" or "L"
Read to Write Interval (Burst Length
≧
4, CAS# Latency = 3)
T0
CLK
T1
T2
T3
T4
T5
T6
T7
T8
1 Clk Interval
DQM
COMMAND
NOP
NOP
BANKA
ACTIVATE
NOP
READ A
WRITE A
NOP
NOP
NOP
CAS# latency=2
tCK2, DQ's
DIN A0
DIN A1
DIN A2
DIN A3
: "H" or "L"
Read to Write Interval (Burst Length
≥
4, CAS# Latency = 2)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK
DQM
COMMAND
CAS# latency=2
tCK2, DQ's
NOP
NOP
READ A
NOP
NOP
WRITE B
NOP
NOP
NOP
DIN B0
DIN B1
DIN B2
DIN B3
: "H" or "L"
Read to Write Interval (Burst Length
≥
4, CAS# Latency = 2)
A read burst without the auto precharge function may be interrupted by a BankPrecharge/
PrechargeAll command to the same bank. The following figure shows the optimum time that
BankPrecharge/ PrechargeAll command is issued in different CAS# latency.
Preliminary
8
Rev 1.4
Oct. 2005
ETRON [ ETRON TECHNOLOGY, INC. ]
