100310 Low Skew 2:8 Differential Clock Driver
October 1991
Revised November 1999
100310
Low Skew 2:8 Differential Clock Driver
General Description
The 100310 is a low skew 8-bit differential clock driver
which is designed to select between two separate differen-
tial clock inputs. The low output to output skew (< 50 ps) is
maintained for either clock input. A LOW on the select pin
(SEL) selects CLKINA, CLKINA and a HIGH on the SEL
pin selects the CLKINB, CLKINB inputs.
The 100310 is ideal for those applications that need the
ability to freely select between two clocks, or to maintain
the ability to switch to an alternate or backup clock should a
problem arise with the primary clock source.
A V
BB
output is provided for single-ended operation.
Features
s
Low output to output skew
s
Differential inputs and outputs
s
Allows multiplexing between two clock inputs
s
Voltage compensated operating range:
(PLCC package only)
−4.2V
to
−5.7V
s
Available to industrial grade temperature range
Ordering Code:
Order Number
100310QC
100310QI
Package Number
V28A
V28A
Package Description
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (−40°C to
+85°C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
28-Pin PLCC
Pin Descriptions
Pin Names
CLKIN
n
, CLKIN
n
SEL
CLK
0–7
, CLK
0–8
V
BB
NC
Select
Differential Clock Outputs
V
BB
Output
No Connect
Description
Differential Clock Inputs
Truth Table
CLKINA CLKINA CLKINB CLKINB SEL CLK
n
CLK
n
H
L
X
X
L
H
X
X
X
X
H
L
X
X
L
H
L
L
H
H
H
L
H
L
L
H
L
H
© 1999 Fairchild Semiconductor Corporation
DS010943
www.fairchildsemi.com
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
