CMP0417AAx-E
Power Up Sequence
1. Apply Power
2. Maintain stable power for a minimum of 200us with /CS=V
IH
CMOS LPRAM
Standby Mode State machines
Power On
/CS=V
IH
Wait 200us
Initial State
/CS=V
IH
, /ZZ=V
IH
/CS=V
IL
, /ZZ=V
IH
/UB or/and /LB=V
IL
/CS=V
IH
, /ZZ=V
IL
Active
Mode
/CS=V
IlL
/ZZ=V
IH
/CS=V
IH
(or/and /UB=/LB=V
IH
)
/ZZ=V
IH
/CS=V
IH
, /ZZ=V
IL
/CS=V
IH
/ZZ=V
IL
/CS=V
IlL
/ZZ=V
IH
Standby Mode
Low Power
Modes 1
(8M/4M/2M bits)
DPD
(Data Invalid)
/CS=V
IH
, /ZZ=V
IL
Standby Mode Characteristics
Mode
Standby
Deep Power Down Mode
Memory Cell Data
Valid
Invalid
¼ valid
Low Power Modes
�½ valid
valid
Standby Current(uA)
70 (ISB1)
10 (ISB0)
40 (ISB0a)
50 (ISB0b)
70 (ISB0c)
Wait Time(us)
0
200
0
0
0
6
Revision 0.5
Aug. 2006
FIDELIX [ FIDELIX ]
