FMP0417CAx-W70E
CAPACITANCE
1)
Item
Input capacitance
Input/Output capacitance
1. Capacitance is sampled, not 100% tested.
CMOS LPRAM
(f=1MHz , T
A
=25’C)
Symbol
C
IN
C
IO
Test Condition
V
IN
=0V
V
IO
=0V
Min
-
-
Max
8
8
Unit
pF
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Symbol
I
LI
I
LO
I
CC1
Average operating current
I
CC2
Output low voltage
Output high voltage
Standby Current(TTL)
Standby Current(CMOS)
V
OL
V
OH
I
SB
I
SB1
I
SB0
I
SB0a
Low Power Modes
I
SB0b
I
SB0c
Cycle time=Min, I
IO
=0mA, 100% duty, /CS=V
IL
, /ZZ=V
IH
,
V
IN
=V
IL
or V
IH
I
OL
=0.5mA
I
OH
=-0.5mA
/CS=V
IH
, /ZZ=V
IH
, Other inputs=V
IH
or V
IL
/CS≥V
CC
-0.2V, /ZZ≥VCC-0.2V, Other inputs=0~V
CC
/ZZ≤0.2V, Other inputs=0~V
CC
, No refresh(DPD)
/ZZ≤0.2V, Other inputs=0~V
CC
, ¼ refresh area selection
/ZZ≤0.2V, Other inputs=0~V
CC
, �½ refresh area selection
/ZZ≤0.2V, Other inputs=0~V
CC
, All refresh area selection
0.8VCCQ
-
-
-
-
-
-
-
-
-
-
-
-
0.3
70
10
55
60
70
-
15
25
0.2VCCQ
mA
V
V
mA
uA
uA
uA
uA
uA
V
IN
=V
SS
to V
CC
/CS=V
IH
, /ZZ=V
IH
, /OE=V
IH
or /WE=V
IL
, V
IO
=V
SS
to V
CC
Cycle time=1us, 100%duty, I
IO
=0mA, /CS≤0.2V, /ZZ=V
IH
,
V
IN
≤0.2V
or V
IN
≥V
CC
-0.2V
Test Conditions
Min
-1
-1
-
Typ
-
-
1.5
Max
1
1
3
Unit
uA
uA
mA
AC Input/Output Reference Waveform
VCCQ
Input
1
VSS
NOTE:
1. AC test inputs are driven at VCCQ for a logic 1 and VSS for a logic 0. Input rise and fall times (10% to 90%) < 1.6ns.
2. Input timing begins at VCCQ/2.
3. Output timing ends at VCCQ/2.
VCCQ/2
2
Test Points
VCCQ/2
3
Output
AC Output Load Circuit
Test Point
DUT
50Ω
VCCQ/2
30pF
5
Revision 0.0
Feb. 2008
FIDELIX [ FIDELIX ]
