Chapter 3
Configuration Registers (CONFIG)
3.1 Introduction
This section describes the configuration registers (CONFIG1 and CONFIG2). The configuration registers
enables or disables the following options:
• Stop mode recovery time (32
×
2OSCOUT cycles or 4096
×
2OSCOUT cycles)
• STOP instruction
• Computer operating properly module (COP)
• COP reset period (COPRS), 8176
×
2OSCOUT or 262,128
×
2OSCOUT
• Enable LVI circuit
• Select LVI trip voltage
3.2 Functional Description
The configuration register is used in the initialization of various options. The configuration register can be
written once after each reset. All of the configuration register bits are cleared during reset. Since the
various options affect the operation of the MCU it is recommended that this register be written immediately
after reset. The configuration register is located at $001E and $001F, and may be read at anytime.
NOTE
The CONFIG registers are one-time writable by the user after each reset.
Upon a reset, the CONFIG registers default to predetermined settings as
shown in
and
3.3 Configuration Register 1 (CONFIG1)
Address:
Read:
Write:
Reset:
$001F
Bit 7
COPRS
0
R
6
R
0
= Reserved
5
R
0
4
LVID
0
3
R
0
2
SSREC
0
1
STOP
0
Bit 0
COPD
0
Figure 3-1. Configuration Register 1 (CONFIG1)
COPRS — COP reset period selection bit
1 = COP reset cycle is 8176
×
2OSCOUT
0 = COP reset cycle is 262,128
×
2OSCOUT
MC68HC908JL3E Family Data Sheet, Rev. 4
Freescale Semiconductor
35
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
