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MC68HC908LJ12CPB 参数 Datasheet PDF下载

MC68HC908LJ12CPB图片预览
型号: MC68HC908LJ12CPB
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器单元 [8-bit microcontroller units]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 413 页 / 4367 K
品牌: FREESCALE [ Freescale ]
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Monitor ROM (MON)  
10.2 Introduction  
This section describes the monitor ROM (MON) and the monitor mode  
entry methods. The monitor ROM allows complete testing of the MCU  
through a single-wire interface with a host computer. Monitor mode entry  
can be achieved without use of the higher test voltage, V  
, as long as  
TST  
vector addresses $FFFE and $FFFF are blank, thus reducing the  
hardware requirements for in-circuit programming.  
In addition, to simply user coding, routines are also stored in the monitor  
ROM area for FLASH memory program /erase and EEPROM emulation.  
10.3 Features  
Features of the monitor ROM include:  
Normal user-mode pin functionality  
One pin dedicated to serial communication between monitor ROM  
and host computer  
Standard mark/space non-return-to-zero (NRZ) communication  
with host computer  
Execution of code in RAM or FLASH  
1
FLASH memory security feature  
FLASH memory programming interface  
Enhanced PLL (phase-locked loop) option to allow use of external  
32.768-kHz crystal to generate internal frequency of 2.4576 MHz  
960 bytes monitor ROM code size  
($FC00–$FDFF and $FE10–$FFCE)  
Monitor mode entry without high voltage, V  
blank ($FFFE and $FFFF contain $FF)  
, if reset vector is  
TST  
Standard monitor mode entry if high voltage, V  
IRQ  
, is applied to  
TST  
Resident routines for in-circuit programming and EEPROM  
emulation  
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or  
copying the FLASH difficult for unauthorized users.  
Technical Data  
156  
MC68HC908LJ12 Rev. 2.1  
Monitor ROM (MON)  
Freescale Semiconductor