Memory Map
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read:
$000A
Unimplemented Write:
Reset:
Read:
$000B
$000C
$000D
$000E
$000F
$0010
$0011
$0012
$0013
Unimplemented Write:
Reset:
Read:
0
0
0
0
Port B LED Control
LEDB5
0
LEDB4
0
LEDB3
0
LEDB2
0
LEDB1
0
LEDB0
0
Register Write:
(LEDB)
Reset:
Read:
Unimplemented Write:
Reset:
Read:
Unimplemented
Write:
Reset:
Read:
Unimplemented Write:
Reset:
Read:
SPRIE
0
R
0
SPMSTR
CPOL
CPHA
SPWOM
0
SPE
0
SPTIE
0
SPI Control Register
Write:
(SPCR)
Reset:
1
0
1
Read: SPRF
OVRF
MODF
SPTE
SPI Status and Control
ERRIE
MODFEN SPR1
SPR0
Register Write:
(SPSCR)
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
0
R7
T7
U
0
R6
T6
U
0
R5
T5
U
0
R4
T4
U
1
0
0
0
R3
T3
U
R2
T2
U
R1
T1
U
R0
T0
U
SPI Data Register
(SPDR)
0
LOOPS
0
ENSCI
0
M
0
WAKE
0
ILTY
0
PEN
0
PTY
0
SCI Control Register 1
(SCC1)
0
U = Unaffected
X = Indeterminate
= Unimplemented
R
= Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 12)
MC68HC908LJ12 — Rev. 2.1
Freescale Semiconductor
Technical Data
47
Memory Map
FREESCALE [ Freescale ]
