Pin-Out and Package Information
Table 33. SCLK INPUT, SDATAI INPUT Timing Specifications
Name
TSU
TH
Characteristic
Min
SDATAI IN to SCLKn
SCLK rise to SDATAI
-5
3
Max
—
—
ns
ns
Unit
SCLK
(
INP
UT
OR OUTPUT
)
SDATA1, 3, 4 (INPUT)
TSU
TH
Figure 19. SCLK Input/Output, SDATAI Input Timing Diagram
10
Pin-Out and Package Information
10.1 Pinning Chart
Table 34. 144 QFP Pin Assignments
144 QFP
Pin
Number
01
Name
Type
Description
SCL/QSPI_CLK
I/O
IIC clock/QSPI clock pin function
select is PLLCR(11)
static chip select 0
SDRAM address / static adr
SDRAM address / static adr
SDRAM address / static adr
SDRAM address / static adr
SDRAM address / static adr
SDRAM address / static adr
sdram clock output
02
03
04
05
06
07
08
09
CS0
A21
A11
A10
A9
A18
A17
BCLK/GPIO10
O
O
O
O
O
O
O
I/O
SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3
46
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
